EM6580 datasheet(40/55 Pages) EMMICRO

40 / 55 page

EM6580

03/07, rev. J

www.emmicroelectronic.com

Name

Add

Hex

Add

Dec.

Reset

Value

Read Bits

Write Bits

Remarks

b'3210

Read / Write Bits

RegCCntl2

0000

0: '0'

1: EnComp

2: EvCount

3: Start

0: Load

1: EnComp

2: EvCount

3: Start

10-bit counter control 2;

comparison, event counter and start

RegCDataL

0000

0: Count[0]

1: Count[1]

2: Count[2]

3: Count[3]

0: CReg[0]

1: CReg[1]

2: CReg[2]

3: CReg[3]

10-bit counter

data low nibble

RegCDataM

0000

0: Count[4]

1: Count[5]

2: Count[6]

3: Count[7]

0: CReg[4]

1: CReg[5]

2: CReg[6]

3: CReg[7]

10-bit counter

data middle nibble

RegCDataH

0000

0: Count[8]

1: Count[9]

2: BitSel[0]

3: BitSel[1]

0: CReg[8]

1: CReg[9]

2: BitSel[0]

3: BitSel[1]

10-bit counter

data high bits

RegPA1

p000

0: PA[4]

1: PA[5]

2: OEnPA[5]

3: NchOpDrPA[5]

0: --

1: PAout[5]

2: OEnPA[5]

3: NchOpDrPA[5]

PortA [5:4]

Direct input read,

Output data register with

Output enable active Hi

RegPaCntl3

pppp

0: PWMoutPA[0]

1: PWMoutPA[1]

2: SerialCkPA [1]

3: SerialStPA [3]

PortA Control3

Output distribution on PA[0], PA[1]

and PA[3]

RegPaCntl4

ppPP

0: freqOutPA[2]

1: Sout/rstPA[2]

2: : freqOutPA[5]

3: NoPdPA[5]

PortA Control4

Output distribution on PA[2]

and PA[5]

RegIRQMask1

101

0000

0: MaskIRQPA[0/5]

1: MaskIRQPA[3/4]

2: MaskIRQCntComp

3: MaskIRQCount0

Port A & Counter

interrupt mask;

masking active 0

RegIRQMask2

102

0000

0: MaskIRQSerial

1: MaskIRQSvld

2: MaskIRQHz64/8

3: MaskIRQHz1

Prescaler, SVLD & serial interf.

interrupt mask;

masking active low

RegIRQ1

103

0000

0: IRQPA[0/5]

1: IRQPA[3/4]

2: IRQCntComp

3: IRQCount0

0:RIRQPA[0/5]

1:RIRQPA[3/4]

2:RIRQCntComp

3:RIRQCount0

Read: port A & Counter interrupt

Write: Reset IRQ if data bit = 1.

REgIRQ2

104

0000

0: IRQSerial

1: IRQSvld

2: IRQHz64/8

3: IRQHz1

0:RIRQSerial

1:RIRQSvld

2:RIRQHz64/8

3:RIRQHz1

Read: Prescaler, SVLD & serial

interface interrupt.

Write: Reset IRQ if data bit = 1

RegSysCntl1

105

000p

p = POR

0: ChTmDis

1: SelIntFull

2: '0'

3: IntEn

0: ChTmDis

1: SelIntFull

2: Sleep

3: IntEn

System control 1;

ChTmDis only usable only for EM

test modes

RegSysCntl2

106

Pp00

p = POR

0: WDVal0

1: WDVal1

2: SleepEn

3: PORstatus

0: --

1: --

2: SleepEn

3: WDReset

System control 2;

watchdog value and periodical reset,

enable sleep mode

RegSleepCR

107

pppp

p = POR

0: SCRsel0

1: SCRsel1

2: SleepCntDis

3: NoPullPA[4]

Sleep Counter reset control

EM6580 Datasheet(PDF) 40 Page - EM Microelectronic - MARIN SA

EM6580 Datasheet(HTML) 40 Page - EM Microelectronic - MARIN SA

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