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EM6580 Datasheet(PDF) 41 Page - EM Microelectronic - MARIN SA

Part # EM6580
Description  Ultra Low Power 8-pin Flash Microcontroller
PDF  55 Pages
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Manufacturer  EMMICRO [EM Microelectronic - MARIN SA]
Direct Link  http://www.emmicroelectronic.com
Logo EMMICRO - EM Microelectronic - MARIN SA

EM6580 Datasheet(HTML) 41 Page - EM Microelectronic - MARIN SA

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R
EM6580
Copyright © 2007, EM Microelectronic-Marin SA
03/07, rev. J
41
www.emmicroelectronic.com
Register
Name
Add
Hex
Add
Dec.
Reset
Value
Read Bits
Write Bits
Remarks
b'3210
Read / Write Bits
RegPresc
6C
108
0000
0: DebSel
1: PrIntSel
2: '0'
3: ExtCPUclkON
0: DebSel
1: PrIntSel
2: ResPresc
3: ExtCPUclkON
Prescaler control;
Debouncer, prescaler interrupt
select and reset,
External CPU clock enable
IXLow
6E
110
xxxx
0: IXLow[0]
1: IXLow[1]
2: IXLow[2]
3: IXLow[3]
Internal µP index
register low nibble;
for µP indexed addressing
IXHigh
6F
111
xxxx
0: IXHigh[4]
1: IXHigh[5]
2: IXHigh[6]
3: '0'
0: IXHigh[4]
1: IXHigh[5]
2: IXHigh[6]
3: --
Internal µP index
register high nibble;
for µP indexed addressing
RegVldCntl
73
115
000p
0: NoWDtim
1: SVLDen
2: VldBusy
3: VldResult
0: NoWDtim
1: SVLDen
2: VldStart
3: ExtVcheck
Voltage level
detector & RC osc. control
RegSVLDlev
74
116
PpPp
0: SVLDlev[0]
1: SVLDlev[1]
2: SVLDlev[2]
3: SVLDlev[3]
SVLD test voltage level select
RegOscTrimH
75
117
pPPP
0: RegOsctrim[4]
1: RegOsctrim[5]
2: RegOsctrim[6]
3: RegOsctrim[7]
Oscillator trimming word, MSB
RegOscTrimL
76
118
PPPP
0: RegOsctrim[0]
1: RegOsctrim[1]
2: RegOsctrim[2]
3: RegOsctrim[3]
Oscillator trimming word, LSB
RegMFP0
79
121
pppp
0:Opt[0]
1:Opt[1]
2:Opt[2]
3:Opt[3]
PA4 pull up/down selection
Counter clock option
Serial Interface clock
Debouncer clock
RegMFP1
7A
122
pppp
0:Opt[4]
1:Opt[5]
2:Opt[7]
3:Opt[7]
RC frequency base selection
RC frequency selection
RC frequency selection
RC frequency selection
RegMFP2
7B
123
pppp
0:Opt[8]
1:
2:
3:
ADC/SVLD level #15 selection
7C
124
xxxx
Reserved for EM6680 software
compatibility.
7D
125
xxxx
Reserved for EM6680 software
compatibility.
RegTestEM1
7E
126
pppp
0: Tmsel[0]
1: Tmsel[1]
2: Tmsel[2]
3: disablePOR
For EM test only
RegTestEM2
7F
127
pppp
0: OeTm0
1: OeTm1
2: TestResSys
3: TestPOR
For EM test only
p = defined by POR at ‘0’ (power on reset) only
P = defined by POR at ‘1’ (power on reset) only
x = undefined state by reset (register must be written before used)
RegTestEm1 and RegTestEm2 can be written only if ChTmDis in RegSysCntl1 is ‘0’. They are used for EM
test only and are Write only. To prevent entering test mode in normal operation one has to set the ChTmDis bit
to ‘1’ as soon as possible after reset. It should be one of first instructions.



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