| Electronic Components Datasheet Search |
|
EM6580WS11 Datasheet(PDF) 39 Page - EM Microelectronic - MARIN SA |
|
|
|||||||||||||||||||||||||||||
EM6580WS11 Datasheet(HTML) 39 Page - EM Microelectronic - MARIN SA |
|
39 / 55 page ![]() R EM6580 Copyright © 2007, EM Microelectronic-Marin SA 03/07, rev. J 39 www.emmicroelectronic.com 13. PERIPHERAL MEMORY MAP Reset values are valid after power up or after every system reset. Register Name Add Hex Add Dec. Reset Value Read Bits Write Bits Remarks b'3210 Read / Write Bits Ram1_0 00 0 xxxx 0: Data0 1: Data1 2: Data2 3: Data3 Direct addressable Ram 80 x 4 bit Ram1_63 4F 79 xxxx 0: Data0 1: Data1 2: Data2 3: Data3 Direct addressable Ram 80 x 4 bit RegPA0 50 80 0000 0: PA[0] 1: PA[1] 2: PA[2] 3: PA[3] 0: PAout[0] 1: PAout[1] 2: PAout[2] 3: PAout[3] PortA [3:0] Direct input read, Output data register RegPa0OE 51 81 0000 0 = after PORend 0: OEnPA[0] 1: OEnPA[1] 2: OEnPA[2] 3: OEnPA[3] PortA [3:0] Output enable active Hi, RegPaCntl1 52 82 pppp p = POR 0: EdgeFallingPA[0/5] 1: EdgeFallingPA[3/4] 2: debunceNoPA[0/5] 3: debunceNoPA[3/4] PortA [3:0] control1 Debounce Yes/No & Faling / Rising edge RegPaCntl2 53 83 pppp p = POR 0: IrqPA[0l/5h] 1: IrqPA[3l/4h] 2: WUchEnPA[0/5] 3: WUchEnPA[3/4] PortA [3:0] control2 WakeUp on change enable & Irq source from PA select Pa0noPDown 54 84 pppp p = POR 0: NoPdPA[0] 1: NoPdPA[1] 2: NoPdPA[2] 3: NoPdPA[3] Option register Pull/down selection on PA[3:0] Default : pull-down ON Pa0NchOpenDr 55 85 pppp p = POR 0: NchOpDrPA[0] 1: NchOpDrPA[1] 2: NchOpDrPA[2] 3: NchOpDrPA[3] Option register N/channel Open Drain Output on PA[3:0] Default : CMOS output RegFreqRst 56 86 ppxx 0: foutSel[0] 1: foutSel[1] 2: PA[3/4]resIn 3: InResAH Output Frequency select and Input reset Control RegSCntl1 57 87 0000 0: MSBnLSB 1: POSnNeg 2: MS0 3: MS1 Serial interface control 1 RegSCntl2 58 88 0000 0: OM[0] 1: RCoscOff 2: Status 3: Start Serial interface control 2 RegSDataL 59 89 0000 0: SerDataL[0] 1: SerDataL[1] 2: SerDataL[2] 3: SerDataL[3] Serial interface low data nibble RegSDataH 5A 90 0000 0: SerDataH[0] 1: SerDataH[1] 2: SerDataH[2] 3: SerDataH[3] Serial interface high data nibble RegCCntl1 5B 91 0000 0: CountFSel0 1: CountFSel1 2: CountFSel2 3: Up/Down 10-bit counter control 1; frequency and up/down |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |