LAN91C110 datasheet(34/55 Pages) SMSC

34 / 55 page

FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications

SMSC DS – LAN91C110 REV. B

Page 34

Rev. 09/05/02

CHIP ID VALUE

DEVICE

LAN91C90/LAN91C92

LAN91C94

LAN91C95

LAN91C96

LAN91C100

LAN91C100FD

LAN91C110

*Note: Shares the chip ID with the LAN91C94. Distinction is made by the revision ID. Revision ID of 6 or

higher represents the LAN91C96.

OFFSET

NAME

TYPE

SYMBOL

EARLY RCV REGISTER

READ/WRITE

ERCV

HIGH

BYTE

LOW

BYTE

RCV

DISCRD

Reserved

ERCV THRESHOLD

RCV DISCRD - Set to discard a packet being received. Will discard packets only in the process of being received. When

set prior to the end of receive packet, bit 4 (RXOVRN) of the interrupt status register will be set to indicate that the packet

was discarded. Otherwise, the packet will be received normally and bit 0 set (RCVINT) in the interrupt status register.

RCV DISCRD is self clearing.

ERCV THRESHOLD - Threshold for ERCV interrupt. Specified in 64 byte multiples.

Whenever the number of bytes written in memory for the presently received packet exceeds the ERCV THRESHOLD,

ERCV INT bit of the INTERRUPT STATUS REGISTER is set.

BANK7

OFFSET

NAME

TYPE

SYMBOL

0 THROUGH 7

EXTERNAL REGISTERS

nCSOUT is driven low by the LAN91C110 when a valid access to the EXTERNAL REGISTER range occurs.

HIGH

BYTE

EXTERNAL R/W REGISTER

LOW

BYTE

EXTERNAL R/W REGISTER

LAN91C110 Datasheet(PDF) 34 Page - SMSC Corporation

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