KW41Z datasheet(49/91 Pages) NXP

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7.4.2 Thermal attributes

Table 23. Thermal attributes

Board type

Symbol

Description

48-pin

Laminate

QFN

75-pin

WLCSP

Unit

Notes

Single-layer (1S)

RθJA

Thermal resistance, junction to

ambient (natural convection)

59.3

106.7

°C/W

2, 1

Four-layer (2s2p)

RθJA

Thermal resistance, junction to

ambient (natural convection)

42.9

57.2

°C/W

2, 1

Single-layer (1S)

RθJMA

Thermal resistance, junction to

ambient (200 ft./min. air speed)

51.6

88.0

°C/W

2, 1

Four-layer (2s2p)

RθJMA

Thermal resistance, junction to

ambient (200 ft./min. air speed)

38.9

51.7

°C/W

2, 1

—

RθJB

Thermal resistance, junction to

board

37.7

24.7

°C/W

—

RθJC

Thermal resistance, junction to

case

0.48

4.3

°C/W

—

ΨJT

Thermal characterization

parameter, junction to package top

outside center (natural convection)

0.2

°C/W

—

RθJB_CSB Thermal characterization

parameter, junction to package

bottom outside center (natural

convection)

—

13.7

°C/W

1. Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental

Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test

Method Environmental Conditions—Forced Convection (Moving Air).

2. Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board horizontal.

3. Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental

Conditions—Junction-to-Board. Board temperature is measured on the top surface of the board near the package.

4. Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate

temperature used for the case temperature. The value includes the thermal resistance of the interface material

between the top of the package and the cold plate.

5. Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental

Conditions—Natural Convection (Still Air).

6. Thermal resistance between the die and the central solder balls on the bottom of the package based on simulation.

7.5 Peripheral operating requirements and behaviors

7.5.1 Core modules

MCU Electrical Characteristics

MKW41Z/31Z/21Z Data Sheet, Rev. 4, 03/2018

NXP Semiconductors

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