KW41Z datasheet(9/91 Pages) NXP

9 / 91 page

• Internal switched mode power supply supporting Buck, Boost, and Bypass

operating modes

• Buck operation supports external voltage sources of 2.1 V to 4.2 V. This reduces

peak current consumption during Rx and Tx by ~25%, ideal for single coin-cell

battery operation (typical CR2032 cell).

• Boost operation supports external voltage sources of 0.9 V to 1.795 V, which is

efficiently increased to the static internal core voltage level, ideal for single

battery operation (typical AA or AAA alkaline cell).

• When DC-DC is not used, the device supports an external voltage range of 1.5 V

to 3.6 V (1.5 - 3.6 V on VDD_RF1, VDD_RF2, VDD_XTAL and

VDD_1P5OUT_PMCIN pins. 1.71 - 3.6 V on VDD_0, VDD_1 and VDDA pins)

• An external inductor is required to support the Buck or Boost modes

• The DC-DC Converter 1.8 V output current drive for external devices (MCU in

RUN mode, Radio is enabled, other peripherals are disabled)

• Up to 44 mA in buck mode with VDD_1P8 = 1.8 V

• Up to 31.4 mA in buck mode with VDD_1P8 = 3.0 V

Direct Memory Access (DMA) Controller

• All data movement via dual-address transfers: read from source, write to

destination

• Programmable source and destination addresses and transfer size

• Support for enhanced addressing modes

• 4-channel implementation that performs complex data transfers with minimal

intervention from a host processor

• Internal data buffer, used as temporary storage to support 16- and 32-byte

transfers

• Connections to the crossbar switch for bus mastering the data movement

• Transfer control descriptor (TCD) organized to support two-deep, nested transfer

operations

• 32-byte TCD stored in local memory for each channel

• An inner data transfer loop defined by a minor byte transfer count

• An outer data transfer loop defined by a major iteration count

• Channel activation via one of three methods:

• Explicit software initiation

• Initiation via a channel-to-channel linking mechanism for continuous

transfers

• Peripheral-paced hardware requests, one per channel

• Fixed-priority and round-robin channel arbitration

• Channel completion reported via optional interrupt requests

Feature Descriptions

MKW41Z/31Z/21Z Data Sheet, Rev. 4, 03/2018

NXP Semiconductors

KW41Z Datasheet(PDF) 9 Page - NXP Semiconductors