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AD9173 Datasheet(PDF) 49 Page - Analog Devices

Part # AD9173
Description  Dual, 16-Bit, 12.6 GSPS RF DAC with Channelizers
PDF  142 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9173 Datasheet(HTML) 49 Page - Analog Devices

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Data Sheet
AD9173
Rev. 0 | Page 49 of 142
This mode can also be used in applications where a sine wave is
all that is required, such as in a local oscillator application.
There is an additional optional calibration NCO block that can
be used as part of the initial system calibration without needing
to reprogram the final main datapath NCO to the final system
configuration. This feature is discussed in more detail in the
Calibration NCO section.
When the NCO test mode is enabled, the data source of the
digital datapath is the dc test data word, meaning that the
JESD204B link can be brought up and data can be transferred
to the device over the link, but the data is not presented to the
DAC when in this test mode. Connection to the SERDES data
source is only achieved by disabling this test mode. The SPI
control bit for this test mode can be set on the fly, but because
disabling the mode and switching to the SERDES datapath
normally requires the lanes and/or interpolation mode to also
be set, on the fly setting or resetting of the NCO only mode
control bit is normally not practical.
N
N
N
+
M
DAC
CORE
PA PROTECT
RAMP
UP/DOWN
GAIN
NCO
CALIBRATION
32-BIT NCO
REG 0x1E2 TO REG 0x1E5
MAIN 48-BIT
NCO
REG 0x114 TO REG 0x119
NCO
NCO
DDSC_EN_DC_INPUT
REG 0x130, BIT 0
NCO
DC AMPLITUDE LEVEL
(REG 0x148 TO REG 0x149)
CHANNEL
GAIN
CHANNEL
GAIN
CHANNEL
GAIN
DDSM_EN_CAL_DC_INPUT
REG 0x1E6, BIT 1
DDSM_EN_CAL_ACC
REG 0x1E6, BIT 2
DDSM_EN_CAL_FREQ_TUNING
REG 0x1E6, BIT 0
DDSC_EN_DC_INPUT
REG 0x130, BIT 0
DDSC_EN_DC_INPUT
REG 0x130, BIT 0
Figure 69. DC Amplitude Injection for NCO Only Mode Block Diagram



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