AD5689 datasheet(4/24 Pages) AD

4 / 24 page

AD5689/AD5687

Data Sheet

Rev. B | Page 4 of 24

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

LOGIC OUTPUTS (SDO)2

Output Low Voltage (VOL)

0.4

ISINK = 200 μA

Output High Voltage (VOH)

VLOGIC − 0.4

ISOURCE = 200 μA

Floating State Output Capacitance

POWER REQUIREMENTS

VLOGIC

1.62

5.5

ILOGIC

µA

VDD

2.7

5.5

Gain = 1

VDD

VREF + 1.5

5.5

Gain = 2

IDD

VIH = VDD, VIL = GND, VDD = 2.7 V to 5.5 V

Normal Mode7

0.59

0.7

All Power-Down Modes8

µA

−40°C to +85°C

µA

−40°C to +105°C

DC specifications tested with the outputs unloaded, unless otherwise noted. Upper dead band = 10 mV; it exists only when VREF = VDD with gain = 1 or when VREF/2 =

VDD with gain = 2. Linearity is calculated using a reduced code range of 256 to 65,280 (AD5689) and 12 to 4080 (AD5687).

Guaranteed by design and characterization; not production tested.

Channel A can have an output current of up to 30 mA. Similarly, Channel B can have an output current of up to 30 mA, up to a junction temperature of 110°C.

VDD = 5 V. The devices include current limiting that is intended to protect them during temporary overload conditions. Junction temperature may be exceeded during

current limit, but operation above the specified maximum operation junction temperature can impair device reliability.

When drawing a load current at either rail, the output voltage headroom, with respect to that rail, is limited by the 25 Ω typical channel resistance of the output

devices. For example, when sinking 1 mA, the minimum output voltage = 25 Ω × 1 mA = 25 mV (see Figure 23).

Initial accuracy presolder reflow is ±750 µV; output voltage includes the effects of preconditioning drift.

Interface inactive. Both DACs active. DAC outputs unloaded.

Both DACs powered down.

AC CHARACTERISTICS

VDD = 2.7 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; 1.62 V ≤ VLOGIC ≤ 5.5 V; all specifications TMIN to TMAX, unless otherwise

noted. Temperature range = −40°C to +105°C, typical at 25°C. Guaranteed by design and characterization, not production tested.

Table 3.

Parameter1

Min

Typ

Max

Unit

Test Conditions/Comments

Output Voltage Settling Time

AD5689

µs

¼ to ¾ scale settling to ±2 LSB

AD5687

µs

¼ to ¾ scale settling to ±2 LSB

Slew Rate

0.8

V/µs

Digital-to-Analog Glitch Impulse

0.5

nV-sec

1 LSB change around major carry

Digital Feedthrough

0.13

nV-sec

Digital Crosstalk

0.1

nV-sec

Analog Crosstalk

0.2

nV-sec

DAC-to-DAC Crosstalk

0.3

nV-sec

Total Harmonic Distortion (THD)2

−80

At ambient, BW = 20 kHz, VDD = 5 V, fOUT = 1 kHz

Output Noise Spectral Density (NSD)

300

nV/√Hz

DAC code = midscale, 10 kHz, gain = 2

Output Noise

µV p-p

0.1 Hz to 10 Hz

Signal-to-Noise Ratio (SNR)

At ambient, BW = 20 kHz, VDD = 5 V, fOUT = 1 kHz

Spurious Free Dynamic Range (SFDR)

At ambient, BW = 20 kHz, VDD = 5 V, fOUT = 1 kHz

Signal-to-Noise-and-Distortion Ratio

(SINAD)

At ambient, BW = 20 kHz, VDD = 5 V, fOUT = 1 kHz

See the Terminology section.

Digitally generated sine wave at 1 kHz.

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