AD5231 datasheet(14/24 Pages) AD

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REV. 0

AD5231

–14–

ADVANCED CONTROL MODES

The AD5231 digital potentiometer contains a set of user pro-

gramming features to address the wide applications available to

these universal adjustment devices. Key programming features

include:

• Scratch Pad Programming to any desirable values

• Nonvolatile memory storage of the present scratch pad

RDAC register value into the EEMEM register

• Increment and Decrement instructions for RDAC wiper

• Left and right Bit Shift of RDAC wiper register to achieve

6 dB level changes

• 28 extra bytes of user-addressable nonvolatile memory

Linear Increment and Decrement Commands

The increment and decrement commands (#14, #15, #6, #7)

are useful for linear step adjustment applications. These commands

simplify microcontroller software coding by allowing the controller

to just send an increment or decrement command to the device.

For increment command, executing instruction #14 with proper

address will automatically move the wiper to the next resistance

segment position. Instruction #15 performs the same function

except address does not need to be specified.

Logarithmic Taper Mode Adjustment ( 6 dB/step)

Four programming instructions produce logarithmic taper

increment and decrement wiper. These settings are activated by

the 6 dB increment and 6 dB decrement instructions #12, #13,

#4, and #5, respectively. For example, starting at zero scale,

executing 11 times the increment instruction #12 will move the

wiper in +6 dB per step from the 0% to full scale RAB. The +6 dB

increment instruction doubles the value of the RDAC register

content each time the command is executed. When the wiper

position is near the maximum setting, the last +6 dB increment

instruction will cause the wiper to go to the full-scale 1023 code

position. Further +6 dB per increment instruction will no longer

change the wiper position beyond its full scale.

6 dB step increment and decrement are achieved by shifting the bit

internally to the left and right, respectively. The following infor-

mation explains the nonideal

±6 dB step adjustment at certain

conditions. Table IV illustrates the operation of the shifting

function on the RDAC register data bits. Each line going down

the table represents a successive shift operation. Note that the left

shift #12 and #13 commands were modified such that if the data

in the RDAC register is equal to zero, and the data is left shifted,

the RDAC register is then set to code 1. Similarly, if the data in

the RDAC register is greater than or equal to midscale, and the

data is left shifted, then the data in the RDAC register is automati-

cally set to full-scale. This makes the left shift function as ideal a

logarithmic adjustment as possible.

The right shift #4 and #5 commands will be ideal only if the LSB

is zero (i.e., ideal logarithmic—no error). If the LSB is a 1, the right

shift function generates a linear half LSB error, which translates to

a numbers of bits dependent logarithmic error as shown in Figure

8. The plot shows the error of the odd numbers of bits for AD5231.

Table IV. Detail Left and Right Shift Functions for 6 dB Step

Increment and Decrement

Left Shift

Right Shift

00 0000 0000

11 1111 1111

00 0000 0001

01 1111 1111

00 0000 0010

00 1111 1111

00 0000 0100

00 0111 1111

00 0000 1000

00 0011 1111

00 0001 0000

00 0001 1111

00 0010 0000

00 0000 1111

00 0100 0000

00 0000 0111

00 1000 0000

00 0000 0011

01 0000 0000

00 0000 0001

10 0000 0000

00 0000 0000

11 1111 1111

00 0000 0000

11 1111 1111

00 0000 0000

Actual conformance to a logarithmic curve between the data

contents in the RDAC register and the wiper position for each

Right Shift #4 and #5 command execution contains an error

only for odd numbers of bits. Even numbers of bits are ideal.

The graph in Figure 8 shows plots of Log_Error [i.e., 20

log10

(error/code)] AD5231. For example, code 3 Log_Error = 20

log10 (0.5/3) = –15.56 dB, which is the worst case. The plot of

Log_Error is more significant at the lower codes.

CODE – From 1 to 1023 by 2.0

103

–40

–60

–80

–20

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

Figure 8. Plot of Log_Error Conformance for Odd

Numbers of Bits Only (Even Numbers of Bits are Ideal)

Using Additional Internal Nonvolatile EEMEM

The AD5231 contains additional internal user storage registers

(EEMEM) for saving constants and other 16-bit data. Table V

provides an address map of the internal storage registers shown

in the functional block diagram as EEMEM1, EEMEM2, and

28 bytes (14 addresses

2 bytes each) of User EEMEM.

Table V. EEMEM Address Map

Address

EEMEM For

0000

RDAC

1, 2

0001

O1 and O2

0010

USER14

0011

USER2

1110

USER13

1111

USER14

Right Shift

(–6 dB/step)

Left Shift

(+6 dB/step)

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