uP7550

4

uP7550-DS-F0002, July 2013

www.upi-semi.com

Power Switches

The uP7550 is a current limited power multiplexer acting

as a high side switch for USB applications where heavy

capacitive loads and short-circuits are likely to be

encountered. It contains two N-Channel MOSFETs Q1 and

Q2 as power switches that supply output current to VOUT

pins. The sources of Q1 and Q2 are connected together to

the VOUT pins, the drain of Q1 is connected to 5VCC pin

and the drain of Q2 is connected to 5VSB pin. The

MOSFETs are without body diode and prevent current flows

when turned off.

Q2 is a 400m

Ω MOSFET with 1A capacity and Q1 is a

80m

Ω MOSFET with 1.8A capacity. The power switches

are driven by internal charge pumps and controlled by S3#

and enable status. The uP7550 switches the output voltage

to 5VSB through Q2 at S3/S4/S5 states, to 5VCC through

Q1 at S0/S1/S2 states.

Charge Pumps and Drivers

An internal charge pump supplies power to the driver circuit

and provides the necessary voltage to pull the gate of the

MOSFET above the source. The driver controls the gate

voltage of the power switch. To limit large current surges

and reduce the associated electromagnetic interference

(EMI) produced, the driver incorporates circuitry that

controls the rise times and fall times of the output voltage.

Chip Enable

The EN pin receives a TTL or CMOS compatible input to

enable/disable the uP7550. Logic low disables the power

switch, charge pump, gate driver and other circuitry and

reduces the supply current down to less than 1uA. Logic

high restores bias to the drive and control circuits and turns

the switch on.

Soft Start

The uP7550 features soft start function to eliminate the

inrush current into downstream and voltage droop of

start interval is 1.3ms typically. The input current to charge

up the load capacitor is proportional to its capacitance.

The uP7550 current limit function may be active during the

plug-in of extreme large capacitive load.

Over Current Limit

The uP7550 continuous monitors the output current for over

current protection to protect the system power, the power

switch, and the load from damage during output short circuit

or soft start interval. When an overload or short circuit is

encountered, the current-sense circuitry sends a control

signal to the driver. The driver in turn reduces the gate

voltage and drives the power FET into its saturation region,

which switches the output into a constant-current mode

and holds the current constant while varying the voltage on

the load. The current limit level is typical 2.3A when the

power switch operates in linear region and is typical 1.5A

in saturation region.

The uP7550 asserts fault condition and pulls low OC# when

over current, over temperature, input under voltage lockout

condition is encountered. The output remains asserted until

the overcurrent or overtemperature condition is removed. A

8ms deglitch circuit prevents the OC# signal from oscillation

Functional Description

Figure 1. Typical Timing Diagram

5VSB

EN

5VSB

_DRV

VOUT

S3#

5VCC

5VCC

_DRV

T1

T2

T3

T4

T5

T6

T7

T8

T9

T10