uP7550

10

uP7550-DS-F0002, July 2013

www.upi-semi.com

Application Information

The uP7550 is a current limited power multiplexer acting

as a high side switch for USB applications where heavy

capacitive loads and short-circuits are likely to be countered.

It switches output voltage to 5VSB at S3/S4/S5 states

with 400m

Ω switch and 1A capability; to 5VCC at S0/S1/

S2 states with 90m

Ω switch and 1.8A capability.

This device features an active-high enable control input.

Soft start function limits the inrush current from supply

input when enabled. Disabling the device reduces its

standby current down to less than 1uA. Optimal switch

logic according to S3# and 5VCC status ensures seamless

output voltage transition. When the output load exceeds

the current-limit threshold or a short is present, the uP7550

asserts overcurrent protection and limits the output current

to a safe level by driving the power switches into saturation

mode.

Other features include soft-start to limit inrush current

during plug-in, thermal shutdown to prevent catastrophic

switch failure from high-current loads, under-voltage lockout

(UVLO) to ensure that the device remains off unless there

is a valid input voltage present. The uP7550 is available in

SOT23-8 package.

Input and output capacitors

Bypass the supply input pins with a single 4.7uF capacitor

as close as possible to the uP7550. A 4.7uF output capacitor

at the output pin is recommended even much larger output

capacitors are already available at the output of the uP7550,

especially if the output capacitors are more than 2 inches

away on the PCB. The inrush current to charge the output

capacitors is calculated as:

SS

OUT

OUT

IN

T

V

C

I

×

=

(A)

Special care should be paid to large output capacitor

applications. Take C

current is I

than the current limit threshold of Q1 and Q2. In this case,

the output voltage ramp up time is controlled by the current

limit function of Q1 and Q2. Fault indication function may

be false triggered and pull low the OC# as shown in Figure

1. The OC# is pulled low after 8ms delay and released

when V

(5V/Div)

OC#

(5V/Div)

EN

(5V/Div)

(400mA/Div)

Time: 5ms/Div

Figure 1. Turn on into 5VSB with 2000uF output capacitor.

Hot Plug Application

The output voltage undergoes an abrupt drop when a device

with large input capacitors is hot plugged into the output of

uP7550 as shown in Figure 2, where a device with 1500uF

is hot plugged into uP7550 output with 470uF output

capacitor. The output voltage ramp up time is controlled by

the current limit level. The OC# is not pulled low since the

output voltage is kept higher than 2.0V before the delay

time.

(2V/Div)

OC#

(2V/Div)

(200mA/Div)

Time: 5ms/Div

Figure 2. Hot plug application with S3# = 0V.

Thermal Consideration

Temperature effect should be well considered when dealing

with voltage drop and power dissipation. The maximum

R

junction temperature. If the device is expected to operate