LTC3828 datasheet(7/32 Pages) LINER

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LTC3828

3828f

ITH1, ITH2 (Pins 2, 13/Pins 30, 12): Error Amplifier Output

and Switching Regulator Compensation Point. Each asso-

ciated channels’ current comparator trip point increases

with this control voltage.

PHSMD (Pin 4, QFN Only): Control input to phase selector

which determines the phase relationship between control-

ler 1, controller 2 and the clockout signal.

VOSENSE1, VOSENSE2 (Pins 5, 14/Pins 1, 13): Error Ampli-

fier Feedback Input. Receives the remotely-sensed feed-

back voltage for each controller from an external resistive

divider across the output.

PLLFLTR (Pin 6/Pin 2): Filter Connection for Phase-

Locked Loop. Alternatively, this pin can be driven with an

AC or DC voltage source to vary the frequency of the

internal oscillator.

FCB/PLLIN (Pin 8/Pin 5): Forced Continuous Control

Input and External Synchronization Input to Phase Detec-

tor. Pulling this pin below 0.8V will force continuous

synchronous operation. Feeding an external clock signal

will synchronize the LTC3828 to the external clock.

SGND (Pin 9/Pin 6): Small Signal Ground. Common

to both controllers, this pin must be routed separately

from high current grounds to the common (–) terminals

of the COUT capacitors.

PI FU CTIO S

TRCKSS2, TRCKSS1 (Pins 10, 1/Pins 7, 29): Soft-Start

and Output Voltage Tracking Inputs. When one channel is

configured to be the master of two outputs a capacitor to

ground at this pin sets the ramp rate. The slave channel

tracks the output of the master channel by reproducing the

VFB voltage of the master channel with a resistor divider

and applying that voltage to its track pin. An internal 1.2

µA

soft-start current is always charging these pins.

SENSE2–, SENSE1– (Pins 11, 4/Pins 10, 32): The (–)

Input to the Differential Current Comparators.

SENSE2+, SENSE1+ (Pins 12, 3/Pins 11, 31): The (+)

Input to the Differential Current Comparators. The ITH pin

voltage and controlled offsets between the SENSE– and

SENSE+ pins in conjunction with RSENSE set the current

trip threshold.

RUN2, RUN1 (Pins 15, 7/Pins 14, 3): Run Control Inputs.

Forcing RUN pins below 1V would shut down the circuitry

required for that particular channel. Forcing the RUN pins

over 2V would turn on the IC.

BOOST2, BOOST1 (Pins 16, 26/Pins 15, 26): Bootstrapped

Supplies to the Top Side Floating Drivers. Capacitors are

connected between the boost and switch pins and Schot-

tky diodes are tied between the boost and INTVCC pins.

Voltage swing at the boost pins is from INTVCC to (VIN +

INTVCC).

(SSOP/QFN)

TYPICAL PERFOR A CE CHARACTERISTICS

3828 G25

VOUT

20mV/DIV

1A/DIV

100

µs/DIV

VIN = 12V

VOUT = 5V

VFCB = OPEN

IOUT = 20mA

3828 G26

VOUT

20mV/DIV

0.5A/DIV

µs/DIV

VIN = 12V

VOUT = 5V

VFCB = 5V

IOUT = 20mA

Burst Mode Operation

(Figure 14)

Constant Frequency (Burst

Inhibit) Operation (Figure 14)

TA = 25°C unless otherwise noted.

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