LTC3828 datasheet(18/32 Pages) LINER

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LTC3828

3828f

APPLICATIO S I FOR ATIO

highest efficiency battery operated systems. Also con-

sider parallel ceramic and high quality electrolytic capaci-

tors as an effective means of achieving ESR and bulk

capacitance goals.

In continuous mode, the source current of the top N-chan-

nel MOSFET is a square wave of duty cycle VOUT/VIN. To

prevent large voltage transients, a low ESR input capacitor

sized for the maximum RMS current of one channel must

be used. The maximum RMS capacitor current is given by:

quiredI

RMS

MAX

OUT

≈

−

()

[]12

This formula has a maximum at VIN = 2VOUT, where

IRMS = IOUT/2. This simple worst case condition is com-

monly used for design because even significant deviations

do not offer much relief. Note that capacitor manufacturer’s

ripple current ratings are often based on only 2000 hours

of life. This makes it advisable to further derate the

capacitor, or to choose a capacitor rated at a higher

temperature than required. Several capacitors may also be

paralleled to meet size or height requirements in the

design. Always consult the manufacturer if there is any

question.

The benefit of the LTC3828 multiphase clocking can be

calculated by using the equation above for the higher

power controller and then calculating the loss that would

have resulted if both controller channels switched on at

the same time. The total RMS power lost is lower when

both controllers are operating due to the interleaving of

current pulses through the input capacitor’s ESR. This is

why the input capacitor’s requirement calculated above

for the worst-case controller is adequate for the dual

controller design. Remember that input protection fuse

resistance, battery resistance and PC board trace resis-

tance losses are also reduced due to the reduced peak

currents in a multiphase system.

The overall benefit of a

multiphase design will only be fully realized when the

source impedance of the power supply/battery is included

in the efficiency testing. The drains of the two top MOSFETS

should be placed within 1cm of each other and share a

common CIN(s). Separating the drains and CIN may pro-

duce undesirable voltage and current resonances at VIN.

The selection of COUT is driven by the required output

voltage ripple and load transient response. Both the ca-

pacitor effective series resistance (ESR) and capacitance

determine the output ripple:

∆V

ESR

OUT

≈∆

⎛

⎝⎜

⎞

⎠⎟

•

Where f = operating frequency, COUT = output capacitance

and

∆IL = ripple current in the inductor. The output ripple

is highest at maximum input voltage since

∆IL increases

with input voltage.

Usually, ceramic capacitors are used to minimize the

output voltage ripple because of their ultralow ESR. Cur-

rently, multilayer ceramic capacitors have capacitor val-

ues up to hundreds of

µF. However, the capacitance of the

ceramic capacitors usually decreases with increased DC

bias voltage and ambient temperature. In general, X5R or

X7R type capacitors are recommended for high perfor-

mance solutions. The OPTI-LOOP current mode control of

LTC3828 provides stable, high performance transient

response even with all ceramic output capacitors. Manu-

factures such as TDK, Taiyo Yuden, Murata and AVX

provide high performance ceramic capacitors.

When high capacitance is needed, especially for load

transient requirement, low ESR polymerized electrolytic

capacitors such as Sanyo POSCAP or Panasonic SP

capacitor can be used in parallel with ceramic capacitors.

Other high performance electolytic capacitor manufactur-

ers include AVX, KEMET and NEC. With LTC3828, a

combination of ceramic and low ESR electrolytic capaci-

tors can provide a low ripple, fast transient, high density

and cost-effective solution. Consult manufacturers for

specific recommendations.

INTVCC Regulator

An internal P-channel low dropout regulator produces 5V

at the INTVCC pin from the VIN supply pin. INTVCC powers

the drivers and internal circuitry within the IC. The INTVCC

pin regulator can supply a peak current of 50mA and

must be bypassed to ground with a minimum of 4.7

µF

tantalum, 10

µF special polymer, or low ESR type electro-

lytic capacitor. A 1

µF ceramic capacitor placed directly

adjacent to the INTVCC and PGND IC pins is highly

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