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¡ Semiconductor

MSM65355

Secondary Function (Continued)

Description

Function

Pin

Type

Shift

Register

84

O

Secondary function of P2.2: shift register 0 data output pin.

85

I

Secondary function of P2.1: shift register 0 data input pin.

86

I/O Secondary function of P2.0: shift register 0 synchronizing clock

input-output pin.

In master mode: clock output

In slave mode: clock input

60

O

Secondary function of P1.7: shift register 1 data output pin.

61

I

Secondary function of P1.6: shift register 1 data input pin.

62

I/O Secondary function of P1.5: shift register 1 synchronizing clock

input-output pin.

In master mode: clock output

In slave mode: clock input

59

O

Secondary function of P7.7: shift register 2 data output pin.

58

I

Secondary function of P7.6: shift register 2 data input pin.

57

I/O Secondary function of P7.5: shift register 2 synchronizing clock

input-output pin.

In master mode: clock output

In slave mode: clock input

Symbol

SFTO0

SFTI0

SFTCK0

SFTO1

SFTI1

SFTCK1

SFTO2

SFTI2

SFTCK2