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MSM6789 Datasheet(PDF) 41 Page - OKI electronic componets |
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MSM6789 Datasheet(HTML) 41 Page - OKI electronic componets |
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41 / 53 page ![]() ¡ Semiconductor MSM6789A/6789L PIN DESCRIPTIONS (for MSM6789L (3.3 V Version)) (Continued) Symbol Type Description Mode Selection. Low level : Stand-alone mode High level : Microcontroller interface mode PDWN I Power Down. When a low level is input the MSM6789L goes to the power down state. Unlike the RESET pin, this pin does not force the MSM6789L to be reset. When an Low level is applied to this pin during recording operation, the MSM6789L is halted, and will be maintained in the power down state while PDWN is low level. After this pin is restored to a high level, postprocessing for recording will be performed. RSEL1 I RSEL2 I MSEL2 MSEL1 RSEL2 RSEL1 Memory capacity L L L L 4M ¥ 1 L L L H 4M ¥ 2 L L H L 4M ¥ 3 L L H H 4M ¥ 4 These pins select the number of serial registers to be connected externallly. MCUM I A high input level causes the MSM6789L to be initialized and to go into the power down state. RESET I Bidirectional data bus to transfer commands and data to and from an external microcontroller. D0 I/O D1 D2 D3 Write Pulse Input. Inputting a low pulse to WR pin causes a command or data to be input via D0 to D3 pins. WR I Read Pulse Input. Inputting a low pulse to RD pin causes status bits or data to be output via D0 to D3 pins. RD I Chip Enable Input. When the CE pin is set to low level and the CE pin is set to a high level, the write pulse (WR) or read pulse (RD) can be accepted. When the CE pin is set to a high level or CE pin is set to a low level, the write pulse (WR) and read pulse (RD) cannot be accepted so that data cannot be communicated via D0 to D3 pins. CE CE I Pin 60 56 57 34 62 24 25 26 27 63 64 65 35 RPM. This pin outputs a high level during recording or playback operation. The state of this pin is the same as the contents of the RPM bit of the status register. RPM O Busy. This pin outputs a high level while a command is being executed. When this pin is held high, do not apply any data to D0 to D3 pins. The state of this pin is the same as the contents of the BUSY bit of the status register. BUSY O 30 29 |
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