ACS772 datasheet(36/41 Pages) ALLEGRO

36 / 41 page

High Accuracy, Hall-Effect-Based, 200 kHz Bandwidth,

Galvanically Isolated Current Sensor IC with 100 µΩ Current Conductor

ACS772

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Chopper Stabilization Technique

Amp

Regulator

Clock/Logic

Hall Element

Tuned

Filter

Anti-Aliasing

LP Filter

Figure 8: Concept of Chopper Stabilization Technique

When using Hall-effect technology, a limiting factor for

switchpoint accuracy is the small signal voltage developed across

the Hall element. This voltage is disproportionally small relative to

the offset that can be produced at the output of the Hall sensor IC.

This makes it difficult to process the signal while maintaining an

accurate, reliable output over the specified operating temperature

and voltage ranges.

Chopper stabilization is a unique approach used to minimize

Hall offset on the chip. Allegro employs a technique to remove

key sources of the output drift induced by thermal and mechani-

cal stresses. This offset reduction technique is based on a signal

modulation-demodulation process. The undesired offset signal is

separated from the magnetic field-induced signal in the frequency

domain, through modulation. The subsequent demodulation acts

as a modulation process for the offset, causing the magnetic field-

induced signal to recover its original spectrum at baseband, while

the DC offset becomes a high-frequency signal. The magnetic-

sourced signal then can pass through a low-pass filter, while the

modulated DC offset is suppressed.

In addition to the removal of the thermal and stress related offset,

this novel technique also reduces the amount of thermal noise

in the Hall sensor IC while completely removing the modulated

residue resulting from the chopper operation. The chopper sta-

bilization technique uses a high-frequency sampling clock. For

demodulation process, a sample-and-hold technique is used. This

high-frequency operation allows a greater sampling rate, which

results in higher accuracy and faster signal-processing capability.

This approach desensitizes the chip to the effects of thermal and

mechanical stresses, and produces devices that have extremely

stable quiescent Hall output voltages and precise recoverabil-

ity after temperature cycling. This technique is made possible

through the use of a BiCMOS process, which allows the use of

low-offset, low-noise amplifiers in combination with high-density

logic integration and sample-and-hold circuits.

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