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AM5728 Datasheet(PDF) 309 Page - Texas Instruments

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Part # AM5728
Description  Sitara Processors Silicon Revision 2.0
PDF  415 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM5728 Datasheet(HTML) 309 Page - Texas Instruments

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1
mii _txclk
n
(input)
miin_txd3
miin_txen, miin_txer
−
,
(outputs)
miin_txd0
mii _rxclk
n
(Input)
1
2
mii _rxd3
n
mii _rxdv miin_rxer
−
,
(Inputs)
mii _rxd0,
n
n
SPRS8xx_GMAC_MIIRCV_03
309
AM5729, AM5728, AM5726
www.ti.com
SPRS953F – DECEMBER 2015 – REVISED MAY 2019
Submit Documentation Feedback
Product Folder Links: AM5729 AM5728 AM5726
Timing Requirements and Switching Characteristics
Copyright © 2015–2019, Texas Instruments Incorporated
Figure 7-53. GMAC Receive Interface Timing MIIn operation
Table 7-71 and Figure 7-54 present timing requirements for GMAC MIIn Transmit 10/100Mbit/s.
Table 7-71. Switching Characteristics Over Recommended Operating Conditions for GMAC MIIn Transmit
10/100 Mbits/s
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
1
td(TX_CLK-TXD)
Delay time, miin_txclk to transmit selected signals valid
0
25
ns
td(TX_CLK-TX_EN)
td(TX_CLK-TX_ER)
Figure 7-54. GMAC Transmit Interface Timing MIIn operation
In Table 7-72 are presented the specific groupings of signals (IOSET) for use with GMAC MII signals.
Table 7-72. GMAC MII IOSETs
SIGNALS
IOSET5
IOSET6
BALL
MUX
BALL
MUX
GMAC MII1
mii1_txd3
C5
8
mii1_txd2
D6
8
mii1_txd1
B2
8
mii1_txd0
C4
8
mii1_rxd3
F5
8
mii1_rxd2
E4
8
mii1_rxd1
C1
8
mii1_rxd0
E6
8
mii1_col
B4
8
mii1_rxer
B3
8
mii1_txer
A3
8
mii1_txen
A4
8
mii1_crs
B5
8
mii1_rxclk
D5
8
mii1_txclk
C3
8
mii1_rxdv
C2
8
GMAC MII0
mii0_txd3
V5
3



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