UPD17P133CS datasheet(37/289 Pages) NEC

37 / 289 page

CHAPTER 3

PROGRAM COUNTER (PC)

3.2.4 Program Counter during Execution of Return Instructions (RET, RETSK, RETI)

During execution of a return instruction (RET, RETSK, RETI), the program counter is restored to the value saved

in the address stack register.

Figure 3-8. Value in the Program Counter during Execution of a Return Instruction

3.2.5 Program Counter during Table Reference (MOVT)

During execution of table reference (MOVT DBF, @AR), the value in the program counter is saved in the stack,

the address register is set by the program counter, then the contents stored at that program memory location is read

into the data buffer (DBF). After the program memory contents are read into DBF, the program counter is restored

to the value saved in the address stack register.

Caution One level of the address stack is temporarily used during execution of table reference. Be careful

of the stack level.

3.2.6 Program Counter during Execution of Skip Instructions (SKE, SKGE, SKLT, SKNE, SKT SKF)

When skip conditions are met and a skip instruction (SKE, SKGE, SKLT, SKNE, SKT, SKF) is executed, the

instruction immediately following the skip instruction is treated as a no operation instruction (NOP). Therefore,

whether skip conditions are met or not, the number of instructions executed and instruction execution time remain

the same.

3.2.7 Program Counter When an Interrupt Is Received

When an interrupt is received, the value in the program counter is saved in the address stack. Next, the vector

address for the interrupt received is placed in the program counter.

3.3 CAUTIONS ON PROGRAM COUNTER OPERATION

Consisting of 10 bits, the

µPD17120/17121's program counter (PC) can specify a program of up to 1024 steps.

As opposed to this, the ROM size is only 768 steps (addresses 0000H-02FFH). If the program counter's value exceeds

300H, the contents of the program are equivalent to reading FFFFH and executing the "SKF PSW, #0FH" instruction.

Therefore, be careful about the following point:

(1) When the instruction at the 768th step (address 02FFH) is executed, it does not automatically happen that

the program counter goes to 0000H. If the instruction up to the 768th step (address 02FFH) is other than

a branch (BR) or (RET) instruction, it will result in specifying a program counter not contained in a ROM. Be

careful about this.

(2) In the same manner as (1), please avoid using an instruction that will branch to after the 768th step (address

02FFH).

MSB

PC9

PC8

PC7

PC6

PC5

PC4

PC3

PC2

PC1

PC0

LSB

Address stack register n

(n = 0 to 4)

UPD17P133CS Datasheet(PDF) 37 Page - NEC

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