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THCV235 Datasheet(PDF) 45 Page - California Eastern Labs |
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THCV235 Datasheet(HTML) 45 Page - California Eastern Labs |
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45 / 68 page ![]() THCV235_THCV236_Rev.3.40_E Copyright©2016 THine Electronics, Inc. THine Electronics, Inc. 45/68 Security E Table 42. THCV235 GPIO Control Register Map (continued) Address (Hex) Bit# R/W Default (Hex) Name Description Note Sub-Link Master Sub-Link Slave 0x45 0xC5 7:5 R 0x0 Reserved - 4 RW 1 GPIO4_INT_ENABLE GPIO4 interrupt enable 0: Disable 1: Enable (*4) 3 RW 1 GPIO3_INT_ENABLE GPIO3 interrupt enable 0: Disable 1: Enable 2 RW 1 GPIO2_INT_ENABLE GPIO2 interrupt enable 0: Disable 1: Enable 1 RW 1 GPIO1_INT_ENABLE GPIO1 interrupt enable 0: Disable 1: Enable 0 RW 1 GPIO0_INT_ENABLE GPIO0 interrupt enable 0: Disable 1: Enable 0x46 0xC6 7:5 R 0x0 Reserved - 4 RW 0 GPIO4_OUTBUF_SEL GPIO4 output buffer select 0: GPIO4 is open-drain output 1: GPIO4 is push pull output - 3 RW 0 GPIO3_OUTBUF_SEL GPIO3 output buffer select 0: GPIO3 is open-drain output 1: GPIO3 is push pull output - 2 RW 0 GPIO2_OUTBUF_SEL GPIO2 output buffer select 0: GPIO2 is open-drain output 1: GPIO2 is push pull output - 1 RW 0 GPIO1_OUTBUF_SEL GPIO1 has only open-drain output buffer. Must be 0 setting 0: GPIO1 is open-drain output - 0 RW 0 GPIO0_OUTBUF_SEL GPIO0 has only open-drain output buffer. Must be 0 setting 0: GPIO0 is open-drain output - 0x47 -0x4F 0xC7 -0xCF 7:0 R 0x00 Reserved - *4 GPIO input transition is counted as GPIO_INT(0x02 or 0x82 bit3). |
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