Electronic Components Datasheet Search
  English  ▼

X  

ADS7028 Datasheet(PDF) 32 Page - Texas Instruments

Click here to check the latest version.
Part # ADS7028
Description  ADS7038 Small, 8-Channel, 12-Bit ADC With SPI Interface, GPIOs, and CRC
PDF  70 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADS7028 Datasheet(HTML) 32 Page - Texas Instruments

Back Button ADS7028 Datasheet HTML 28Page - Texas Instruments ADS7028 Datasheet HTML 29Page - Texas Instruments ADS7028 Datasheet HTML 30Page - Texas Instruments ADS7028 Datasheet HTML 31Page - Texas Instruments ADS7028 Datasheet HTML 32Page - Texas Instruments ADS7028 Datasheet HTML 33Page - Texas Instruments ADS7028 Datasheet HTML 34Page - Texas Instruments ADS7028 Datasheet HTML 35Page - Texas Instruments ADS7028 Datasheet HTML 36Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 32 / 70 page
background image
32
ADS7038
SBAS979 – JUNE 2019
www.ti.com
Product Folder Links: ADS7038
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
8.5.14 ALERT_CH_SEL_LSB Register (Address = 0x14) [reset = 0x0]
ALERT_CH_SEL_LSB is shown in Figure 32 and described in Table 24.
Return to the Summary Table.
Figure 32. ALERT_CH_SEL_LSB Register
7
6
5
4
3
2
1
0
ALERT_CH_SEL[7:0]
R/W-0b
Table 24. ALERT_CH_SEL_LSB Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
ALERT_CH_SEL[7:0]
R/W
0b
Select channels for which the alert flags can assert the internal
ALERT signal. The ALERT signal can be mapped to the digital
output channel configured in the ALERT_PIN[3:0] field.
0b = Alert flags for this channel do not assert the ALERT pin.
1b = Alert flags for this channel assert the ALERT pin.
8.5.15 ALERT_MAP Register (Address = 0x16) [reset = 0x0]
ALERT_MAP is shown in Figure 33 and described in Table 25.
Return to the Summary Table.
Figure 33. ALERT_MAP Register
7
6
5
4
3
2
1
0
RESERVED
ALERT_CRCIN
R-0b
R/W-0b
Table 25. ALERT_MAP Register Field Descriptions
Bit
Field
Type
Reset
Description
7-1
RESERVED
R
0b
Reserved. Reads return 0b.
0
ALERT_CRCIN
R/W
0b
Enable or disable the alert notification for CRC error on input data
(CRCERR_IN = 1b).
0b = ALERT signal is not asserted when CRCERR_IN = 1b.
1b = ALERT signal is asserted when CRCERR_IN = 1b. Clear
CRCERR_IN for deasserting the ALERT pin.
8.5.16 ALERT_PIN_CFG Register (Address = 0x17) [reset = 0x0]
ALERT_PIN_CFG is shown in Figure 34 and described in Table 26.
Return to the Summary Table.
Figure 34. ALERT_PIN_CFG Register
7
6
5
4
3
2
1
0
ALERT_PIN[3:0]
RESERVED
ALERT_LOGIC[1:0]
R/W-0b
R-0b
R/W-0b
Table 26. ALERT_PIN_CFG Register Field Descriptions
Bit
Field
Type
Reset
Description
7-4
ALERT_PIN[3:0]
R/W
0b
Internal ALERT output of the digital window comparator will be
output on this channel. This channel must be configured as digital
output.
3-2
RESERVED
R
0b
Reserved. Reads return 0b.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com