HD64F2145 datasheet(460/829 Pages) RENESAS

460 / 829 page

Rev. 2.0, 08/02, page 420 of 788

16.3.8

2C Bus Extended Control Register (ICXR)

ICXR enables or disables the I

2C bus interface interrupt generation and continuous receive

operation, and indicates the status of receive/transmit operations.

Bit

Bit Name

Initial Value R/W

Description

STOPIM

R/W

Stop Condition Interrupt Source Mask

Enables or disables the interrupt generation when the stop

condition is detected in slave mode.

0: Enables IRIC flag setting and interrupt generation when

the stop condition is detected (STOP = 1 or ESTP = 1) in

slave mode.

1: Disables IRIC flag setting and interrupt generation when

the stop condition is detected.

HNDS

R/W

Handshake Receive Operation Select

Enables or disables continuous receive operation in receive

mode.

0: Enables continuous receive operation

1: Disables continuous receive operation

When the HNDS bit is cleared to 0, receive operation is

performed continuously after data has been received

successfully while ICDRF flag is 0.

When the HNDS bit is set to 1, SCL is fixed to the low level

and the next data transfer is disabled after data has been

received successfully while the ICDRF flag is 0. The bus

line is released and next receive operation is enabled by

reading the receive data in ICDR.

HD64F2145 Datasheet(PDF) 460 Page - Renesas Technology Corp