HD64F2145 datasheet(464/829 Pages) RENESAS

464 / 829 page

Rev. 2.0, 08/02, page 424 of 788

16.4

Operation

The I

2C bus interface has an I2C bus format and a serial format.

16.4.1

2C Bus Data Format

The I

2C bus format is an addressing format with an acknowledge bit. This is shown in figure 16.3.

The first frame following a start condition always consists of 9 bits.

IIC_0 only is capable of formatless operation, as shown in figure 16.4.

The serial format is a non-addressing format with no acknowledge bit. This is shown in figure

16.5.

Figure 16.6 shows the I

2C bus timing.

The symbols used in figures 16.3 to 16.6 are explained in table 16.6.

SLA

DATA

Transfer bit count

(n = 1 to 8)

Transfer frame count

(m = from 1)

SLA

7n1

DATA

1m1

SLA

1m2

DATA

(a) FS = 0 or FSX = 0

(b) Start condition retransmission FS = 0 or FSX = 0

Upper row: Transfer bit count (n1, n2 = 1 to 8)

Lower row: Transfer frame count (m1, m2 = from 1)

Figure 16.3 I

2C Bus Data Format (I2C Bus Format)

FS = 0 or FSX = 0

DATA

Transfer bit count

(n = 1 to 8)

Transfer frame count

(m = from 1)

Note: * This mode is applied to the PC monitor system standard DDC (Display Data Channel).

Figure 16.4 I

2C Bus Data Format (Formatless) (IIC_0 Only)

HD64F2145 Datasheet(PDF) 464 Page - Renesas Technology Corp

HD64F2145 Datasheet(HTML) 464 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL