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PCI6621 Datasheet(PDF) 158 Page - Texas Instruments |
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PCI6621 Datasheet(HTML) 158 Page - Texas Instruments |
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158 / 204 page  7−14 7.22 Subsystem Access Register The contents of the subsystem access register are aliased to the subsystem vendor ID and subsystem ID registers at PCI offsets 2Ch and 2Eh, respectively. See Table 7−15 for a complete description of the register contents. Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Name Subsystem access Type RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name Subsystem access Type RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Register: Subsystem access Offset: 50h Type: Read/Write Default: 0000 0000h Table 7−15. Subsystem Access Register Description BIT FIELD NAME TYPE DESCRIPTION 31−16 SubsystemID RW Subsystem device ID. The value written to this field is aliased to the subsystem ID register at PCI offset 2Eh. 15−0 SubsystemVendorID RW Subsystem vendor ID. The value written to this field is aliased to the subsystem vendor ID register at PCI offset 2Ch. |
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