PCI6421 datasheet(54/204 Pages) TI

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3−6

3.5.4

Flash Media Card Detection

The PCI6x21/PCI6x11 controller detects an MMC/SD card insertion through the MC_CD_0 terminal. When this

terminal is 0, an MMC/SD card is inserted in the socket. The PCI6x21/PCI6x11 controller debounces the MC_CD_0

signal such that instability of the signal does not cause false card insertions. The debounce time is approximately 50

ms. The MC_CD_0 signal is not debounced on card removals. The filtered MC_CD_0 signal is used in the MMC/SD

card detection and power control logic.

The MMC/SD card detection and power control logic contains three main states:

•

Socket empty, power off

•

Card inserted, power off

•

Card inserted, power on

The PCI6x21/PCI6x11 controller detects a Memory Stick card insertion through the MC_CD_1 terminal. When this

terminal is 0, a Memory Stick card is inserted in the socket. The PCI6x21/PCI6x11 controller debounces the

MC_CD_1 signal such that instability of the signal does not cause false card insertions. The debounce time is

approximately 50 ms. The MC_CD_1 signal is not debounced on card removals. The filtered MC_CD_1 signal is used

in the Memory Stick card detection and power control logic.

The Memory Stick card detection and power control logic contains three main states:

•

Socket empty, power off

•

Card inserted, power off

•

Card inserted, power on

3.5.5

Power Switch Interface

The power switch interface of the PCI6x21/PCI6x11 controller is a 3-pin serial interface. This 3-pin interface is

implemented such that the PCI6x21/PCI6x11 controller can connect to both the TPS2226 and TPS2228 power

switches. Bit 10 (12V_SW_SEL) in the general control register (PCI offset 86h, see Section 4.31) selects the power

switch that is implemented. The PCI6x21/PCI6x11 controller defaults to use the control logic for the TPS2228 power

switch. See Table 3−2 and Table 3−5 below for the power switch control logic.

Table 3−2. TPS2228 Control Logic—xVPP/VCORE

AVPP/VCORE CONTROL SIGNALS

OUTPUT

V_AVPP/VCORE

BVPP/VCORE CONTROL SIGNALS

OUTPUT

V_BVPP/VCORE

D8(SHDN)

OUTPUT

V_AVPP/VCORE

D8(SHDN)

D10

OUTPUT

V_BVPP/VCORE

0 V

3.3 V

5 V

Hi-Z

1.8 V

Hi-Z

Table 3−3. TPS2228 Control Logic—xVCC

AVCC CONTROL SIGNALS

OUTPUT

V_AVCC

BVCC CONTROL SIGNALS

OUTPUT

V_BVCC

D8(SHDN)

OUTPUT

V_AVCC

D8(SHDN)

OUTPUT

V_BVCC

0 V

3.3 V

5 V

0 V

Hi-Z

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