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PCI6421 Datasheet(PDF) 60 Page - Texas Instruments

Part # PCI6421
Description  DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PDF  204 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCI6421 Datasheet(HTML) 60 Page - Texas Instruments

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3−12
S1
1
0
0
0
0
0
0
b7 b6 b5 b4 b3
b2 b1 b0
AA
Slave Address
Word Address
R/W
Data Byte 2
Data Byte 1
Data Byte 0
M
P
M
M
M = Master Acknowledgement
S/P = Start/Stop Condition
A = Slave Acknowledgement
Data Byte 3
M
S1
1
0
0
0
001
A
Restart
R/W
Slave Address
Start
Figure 3−10. EEPROM Interface Doubleword Data Collection
3.6.4
Serial-Bus EEPROM Application
When the PCI bus is reset and the serial-bus interface is detected, the PCI6x21/PCI6x11 controller attempts to read
the subsystem identification and other register defaults from a serial EEPROM.
This format must be followed for the PCI6x21/PCI6x11 controller to load initializations from a serial EEPROM. All bit
fields must be considered when programming the EEPROM.
The serial EEPROM is addressed at slave address 1010 000b by the PCI6x21/PCI6x11 controller. All hardware
address bits for the EEPROM must be tied to the appropriate level to achieve this address. The serial EEPROM chip
in the sample application (Figure 3−10) assumes the 1010b high-address nibble. The lower three address bits are
terminal inputs to the chip, and the sample application shows these terminal inputs tied to GND.



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