PCI6421 datasheet(130/204 Pages) TI

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5−18

5.16 ExCA Memory Windows 0−4 End-Address High-Byte Registers

These registers contain the high nibble of the 16-bit memory window end address for memory windows 0, 1, 2, 3,

and 4. The lower 4 bits of these registers correspond to bits A23−A20 of the end address. In addition, the memory

window wait states are set in this register. See Table 5−12 for a complete description of the register contents.

Bit

Name

ExCA memory windows 0−4 end-address high-byte

Type

Default

ExCA memory window 0 end-address high-byte

Offset:

CardBus Socket Address + 813h:

Card A ExCA Offset 13h

Card B ExCA Offset 53h

ExCA memory window 1 end-address high-byte

Offset:

CardBus Socket Address + 81Bh:

Card A ExCA Offset 1Bh

Card B ExCA Offset 5Bh

ExCA memory window 2 end-address high-byte

Offset:

CardBus Socket Address + 823h:

Card A ExCA Offset 23h

Card B ExCA Offset 63h

ExCA memory window 3 end-address high-byte

Offset:

CardBus Socket Address + 82Bh:

Card A ExCA Offset 2Bh

Card B ExCA Offset 6Bh

ExCA Memory window 4 end-address high-byte

Offset:

CardBus Socket Address + 833h:

Card A ExCA Offset 33h

Card B ExCA Offset 73h

Type:

Read/Write, Read-only

Default:

00h

Table 5−12. ExCA Memory Windows 0−4 End-Address High-Byte Registers Description

BIT

SIGNAL

TYPE

FUNCTION

7−6

MEMWS

Wait state. These bits specify the number of equivalent ISA wait states to be added to 16-bit memory

accesses. The number of wait states added is equal to the binary value of these 2 bits.

5−4

RSVD

Reserved. These bits return 0s when read. Writes have no effect.

3−0

ENDHN

End-address high nibble. These bits represent the upper address bits A23−A20 of the memory window end

address.

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