C8051F310/1/2/3/4/5/6/7
86
Rev. 1.6
Table 8.3. Special Function Registers
Register
Address
Description
Page
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
ACC
0xE0
Accumulator
90
ADC0CF
0xBC
ADC0 Configuration
57
ADC0CN
0xE8
ADC0 Control
58
ADC0GTH
0xC4
ADC0 Greater-Than Compare High
59
ADC0GTL
0xC3
ADC0 Greater-Than Compare Low
59
ADC0H
0xBE
ADC0 High
57
ADC0L
0xBD
ADC0 Low
57
ADC0LTH
0xC6
ADC0 Less-Than Compare Word High
60
ADC0LTL
0xC5
ADC0 Less-Than Compare Word Low
60
AMX0N
0xBA
AMUX0 Negative Channel Select
56
AMX0P
0xBB
AMUX0 Positive Channel Select
55
B
0xF0
B Register
91
CKCON
0x8E
Clock Control
189
CLKSEL
0xA9
Clock Select
119
CPT0CN
0x9B
Comparator0 Control
70
CPT0MD
0x9D
Comparator0 Mode Selection
72
CPT0MX
0x9F
Comparator0 MUX Selection
71
CPT1CN
0x9A
Comparator1 Control
73
CPT1MD
0x9C
Comparator1 Mode Selection
75
CPT1MX
0x9E
Comparator1 MUX Selection
74
DPH
0x83
Data Pointer High
89
DPL
0x82
Data Pointer Low
88
EIE1
0xE6
Extended Interrupt Enable 1
97
EIP1
0xF6
Extended Interrupt Priority 1
98
EMI0CN
0xAA
External Memory Interface Control
115
FLKEY
0xB7
Flash Lock and Key
113
FLSCL
0xB6
Flash Scale
114
IE
0xA8
Interrupt Enable
95
IP
0xB8
Interrupt Priority
96
IT01CF
0xE4
INT0/INT1 Configuration
99
OSCICL
0xB3
Internal Oscillator Calibration
118
OSCICN
0xB2
Internal Oscillator Control
118
OSCXCN
0xB1
External Oscillator Control
121
P0
0x80
Port 0 Latch
132
P0MDIN
0xF1
Port 0 Input Mode Configuration
132
P0MDOUT
0xA4
Port 0 Output Mode Configuration
133
P0SKIP
0xD4
Port 0 Skip
133
P1
0x90
Port 1 Latch
134
P1MDIN
0xF2
Port 1 Input Mode Configuration
134
P1MDOUT
0xA5
Port 1 Output Mode Configuration
135
P1SKIP
0xD5
Port 1 Skip
135
P2
0xA0
Port 2 Latch
136
P2MDIN
0xF3
Port 2 Input Mode Configuration
136
P2MDOUT
0xA6
Port 2 Output Mode Configuration
137
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
