X9521 datasheet(6/25 Pages) INTERSIL

6 / 25 page

FN8207.1

August 25, 2005

The data in the WCR is then decoded to select and

enable one of the respective FET switches. A “make

before break” sequence is used internally for the FET

switches when the wiper is moved from one tap position

to another.

Hot Pluggability

Figure 7 shows a typical waveform that the X9521 might

experience in a Hot Pluggable situation. On power-up,

Vcc applied to the X9521 may exhibit some amount of

ringing, before it settles to the required value.

The device is designed such that the wiper terminal

(RWx) is recalled to the correct position (as per the last

stored in the DCP NVM), when the voltage applied to

Vcc exceeds VTRIP for a time exceeding tpu.

Therefore, if

ttrans is defined as the time taken for Vcc to

settle above VTRIP (Figure 7): then the desired wiper ter-

minal position is recalled by (a maximum) time:

ttrans +

tpu. It should be noted that ttrans is determined by sys-

tem hot plug conditions.

DCP Operations

In total there are three operations that can be performed

on any internal DCP structure:

—DCP Nonvolatile Write

—DCP Volatile Write

—DCP Read

A nonvolatile write to a DCP will change the “wiper

position” by simultaneously writing new data to the

associated WCR and NVM. Therefore, the new “wiper

position” setting is recalled into the WCR after Vcc of the

X9521 is powered down and then powered back up.

A volatile write operation to a DCP however, changes the

“wiper position” by writing new data to the associated

WCR only. The contents of the associated NVM register

remains unchanged. Therefore, when Vcc to the device

is powered down then back up, the “wiper position”

reverts to that last position written to the DCP using a

nonvolatile write operation.

Both volatile and nonvolatile write operations are

executed using a three byte command sequence: (DCP)

Slave Address Byte, Instruction Byte, followed by a Data

Byte (See Figure 9).

A DCP Read operation allows the user to “read out” the

current “wiper position” of the DCP, as stored in the

associated WCR. This operation is executed using the

Random Address Read command sequence, consisting

of the (DCP) Slave Address Byte followed by an

Instruction Byte and the Slave Address Byte again (Refer

to Figure 10.).

Instruction Byte

While the Slave Address Byte is used to select the DCP

devices, an Instruction Byte is used to determine which

DCP is being addressed.

The Instruction Byte (Figure 8) is valid only when the

Device Type Identifier and the Internal Device

Address bits of the Slave Address are set to

1010111. In this case, the two Least Significant Bit’s

(I1 - I0) of the Instruction Byte are used to select the

particular DCP (0 - 2). In the case of a Write to any of

the DCPs (i.e. the LSB of the Slave Address is 0), the

Most Significant Bit of the Instruction Byte (I7), deter-

mines the Write Type (WT) performed.

If WT is “1”, then a Nonvolatile Write to the DCP occurs.

In this case, the “wiper position” of the DCP is changed

by simultaneously writing new data to the associated

WCR and NVM. Therefore, the new “wiper position” set-

ting is recalled into the WCR after Vcc of the X9521 has

been powered down then powered back up

Figure 7.

DCP Power-up

Vcc

VTRIP

Vcc (Max.)

tpu

Maximum Wiper Recall time

ttrans

X9521

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