X9521 datasheet(8/25 Pages) INTERSIL

8 / 25 page

FN8207.1

August 25, 2005

P0 = 0) or (P1 = 1, P0 = 1) are reserved sequences, and

will result in no ACKNOWLEDGE after sending an

Instruction Byte on SDA.

The factory default setting of all “wiper position” settings

is with 00h stored in the NVM of the DCPs. This corre-

sponds to having the “wiper teminal” RWX (x=1,2) at the

“lowest” tap position, Therefore, the resistance between

RWX and RLX is a minimum (essentially only the Wiper

Resistance, RW).

DCP Read Operation

A read of DCPx (x = 1,2) can be performed using the

three byte random read command sequence shown in

Figure 10.

The master issues the START condition and the Slave

Address Byte 10101110 which specifies that a “dummy”

write” is to be conducted. This “dummy” write operation

sets which DCP is to be read (in the preceding Read

operation). An ACKNOWLEDGE is returned by the

X9521 after the Slave Address if received correctly. Next,

an Instruction Byte is issued on SDA. Bits P1 - P0 of the

Instruction Byte determine which DCP “wiper position” is

to be read. In this case, the state of the WT bit is “don’t

care”. If the Instruction Byte format is valid, then another

ACKNOWLEDGE is returned by the X9521.

Following this ACKNOWLEDGE, the master immediately

issues another START condition and a valid Slave

address byte with the R/W bit set to 1. Then the X9521

issues an ACKNOWLEDGE followed by Data Byte, and

finally, the master issues a STOP condition. The Data

Byte read in this operation, corresponds to the “wiper

position” (value of the WCR) of the DCP pointed to by

bits P1 and P0.

It should be noted that when reading out the data byte for

DCP1 (100 Tap), the upper most significant bit is an

“unknown”. For DCP2 (256 Tap) however, all bits of the

data byte are relevant (See Figure 10).

Slave

Address

Instruction

Byte

Slave

Address

Data Byte

SDA Bus

Signals from

the Slave

Signals from

the Master

Figure 10.

DCP Read Sequence

“Dummy” write

READ Operation

10 1

1 11 0

00 00

10 1

1 11 1

WRITE Operation

MSB

LSB

DCPx

x = 1

x = 2

“-” = DON’T CARE

Slave

Address

Byte

Data

Byte

SDA Bus

Signals from

the Slave

Signals from

the Master

Figure 11. EEPROM Byte Write Sequence

Internal

Device

Address

1 01 0 0 0 0 0

WRITE Operation

X9521

X9521 Datasheet(PDF) 8 Page - Intersil Corporation

X9521 Datasheet(HTML) 8 Page - Intersil Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Datasheet Download

Link URL