1M

2.5V ± 3.3V

1M

AUX_SRCP

AUX_SRCN

SCL_SRC

SDA_SRC

x

x

DP159 in

48-pin QFN

AUXN

AUXP

SCL_SNK

DP SINK

C_AUX

C_AUX

AUXP

AUXN

SDA_SNK

REFCLKP

REFCLKN

x

x

DP159

HPD

DP SINK

HPD

x

x

x

DP159

HPD

DP SINK

HPD

OPTION1

OPTION2

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2.1

HPD Implementation

There are two possible implementations for HPD: HPD routed around DP159 or HDP routed thru DP159.

Both options are illustrated Figure 2.

Figure 2. HPD Implementation

2.2

AUX Implementation

The DP159 AUX interface can be used for one of two purposes: (1) Converting I2C-Over-Aux to DDC. (2)

Clock output. The conversion of I2C-Over-AUX is not needed for a displayPort sink. The clock output,

available only in 48-pin version of DP159, is a divided down (datarate/20 or datarate/40) version of the

clock feeding the OUT[3:0]P/N. For example for a 5.4 Gbps (HBR2) datarate, the clock output can be

either 135 MHz (divide by 40) or 270 MHz (divide by 20). The clock output maybe useful for some

DisplayPort RX that have difficulty tracking the jitter on the OUT[3:0], and therefore, require a reference

clock that contains the same high frequency jitter as the OUT[3:0].

Figure 3. DP159 48-pin QFN AUX Channel Implementation

Do not connect to the DP159's AUX interface to the sinks AUX interface.

3

SLLA358 – December 2015

DP159 as DisplayPort Retimer

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