Software Implementation

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3

Software Implementation

During link training, the DP159 does not monitor the AUX transaction between a DisplayPort source and a

DisplayPort sink as a typical DisplayPort retimer would. Because of this, an external microprocessor

(within DisplayPort Source or Sink) must configure the DP159 during all aspects of the link training

process.

Software Requirements:

1. Configure DP159 after power up or exiting the reset state (OE pin from low to high).

2. Monitor de-assertion of HPD due to loss of DisplayPort Sink (cable removal)

(a) Reinitialize DP159 PLL settings when sink is no longer detected.

(b) Disable Rx and Tx lanes.

(c) Disable Adaptive Equalizer and enable Fixed EQ.

3. Monitor loss of DisplayPort Source when AUXP transitions from low to high

(a) Reinitialize DP159 PLL settings when source is no longer detected.

(b) Disable Rx and TX lanes

(c) Disable Adaptive Equalizer and enable Fixed EQ.

4. Monitor change in Datarate and number of lanes.

(a) Must reinitialize DP159’s PLL settings when change in datarate occurs.

(b) Must enable/disable Rx and Tx paths based on number of lanes.

(c) Disable Adaptive Equalizer and enable Fixed EQ.

5. During Clock Recovery Phase of Link Training

(a) Set equalizer to Fixed EQ. The Adaptive Equalizer will not adaptive with a clock pattern

(b) Monitor when DP159’s PLL is locked.

(c) After PLL is locked, transition PLL operating mode to PD mode

6. During Channel Equalization Phase of Link Training

(a) Switch from Fixed EQ to adaptive EQ.

Note vast majority of registers mentioned in this section are not found in the SNx5DP159 datasheet, but

can found at: DP159 X-Mode Registers (SLLA359).

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DP159 as DisplayPort Retimer

SLLA358 – December 2015

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