Application Report

SLLA358 – December 2015

DP159 as DisplayPort Retimer

Mike Campbell

ABSTRACT

The SNx5DP159 compensates for ISI loss across a transmission line to provide the optimum DP electrical

application for the DP159, the DP159 can also be used in a DisplayPort application (like a DisplayPort

Monitor). This document is intended to be used to describe how to use the DP159 in a DisplayPort

application.

Contents

1

Introduction

................................................................................................................... 2

2

Local I

........................................................................................................... 2

3

Software Implementation

................................................................................................... 8

4

Initial Power-up Configuration

.............................................................................................. 9

5

DisplayPort Sink Link Training Suggestions

............................................................................ 12

List of Figures

1

Local I

........................................................................................ 2

2

HPD Implementation

........................................................................................................ 3

3

DP159 48-pin QFN AUX Channel Implementation

...................................................................... 3

4

DisplayPort Main Link Implementation

.................................................................................... 4

5

VOD vs VSADJ Resistance

................................................................................................ 4

6

DP RX Connector

............................................................................................................ 5

7

DP159 RGZ (48-Pin QFN)

.................................................................................................. 6

8

Xilinx FPGA

................................................................................................................... 7

9

DisplayPort 1.2a Link Training CR Phase State Diagram

............................................................ 13

10

DisplayPort 1.2a Link Training Channel Equalization Link Phase State Diagram

................................. 14

List of Tables

1

DP159 I

........................................................................................ 2

2

REFCLK_OUT Frequencies

.............................................................................................. 12

3

Sink’s DPCD TRAINING_AUX_RD_INTERVAL Register

............................................................ 12

1

SLLA358 – December 2015

DP159 as DisplayPort Retimer

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