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CC3230SF Datasheet(PDF) 86 Page - Texas Instruments |
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CC3230SF Datasheet(HTML) 86 Page - Texas Instruments |
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86 / 104 page ![]() 10.2.3 Clock Interface Guidelines The following guidelines are for the slow clock: • The 32.768-kHz crystal must be placed close to the VQFN package. • Ensure that the load capacitance is tuned according to the board parasitics to the frequency tolerance within ±150 ppm. • The ground plane on layer two is solid below the trace lanes, and there is ground around these traces on the top layer. The following guidelines are for the fast clock: • The 40-MHz crystal must be placed close to the VQFN package. • Ensure that the load capacitance is tuned according to the board parasitics to the frequency tolerance within ±10 ppm at room temperature. The total frequency across parts, temperature, and with aging must be ±25 ppm to meet the WLAN specification. • To avoid noise degradation, ensure that no high-frequency lines are routed close to the routing of the crystal pins. • Ensure that crystal tuning capacitors are close to the crystal pads. • Both traces (XTAL_N and XTAL_P) should be as close as possible to parallel and approximately the same length. • The ground plane on layer two is solid below the trace lines, and there should be ground around these traces on the top layer. • For frequency tuning, see CC31xx & CC32xx Frequency Tuning. 10.2.4 Digital Input and Output Guidelines The following guidelines are for the digital I/Os: • Route SPI and UART lines away from any RF traces. • Keep the length of the high-speed lines as short as possible to avoid transmission line effects. • Keep the line lower than 1/10 of the rise time of the signal to ignore transmission line effects (required if the traces cannot be kept short). Place the resistor at the source end closer to the device that is driving the signal. • Add a series-terminating resistor for each high-speed line (for example, SPI_CLK or SPI_DATA) to match the driver impedance to the line. Typical terminating-resistor values range from 27 to 36 Ω for a 50-Ω line impedance. • Route high-speed lines with a continuous ground reference plane below it to offer good impedance throughout. This routing also helps shield the trace against EMI. • Avoid stubs on high-speed lines to minimize the reflections. If the line must be routed to multiple locations, use a separate line driver for each line. • If the lines are longer compared to the rise time, add series-terminating resistors near the driver for each high-speed line to match the driver impedance to the line. Typical terminating-resistor values range from 27 to 36 Ω for a 50-Ω line impedance. CC3230S, CC3230SF SWRS226 – FEBRUARY 2020 www.ti.com 86 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: CC3230S CC3230SF |
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