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TLV7021 Datasheet(PDF) 8 Page - Texas Instruments |
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TLV7021 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 44 page ![]() t ON V OH/2 V EE OUT VCC VEE + 1.6V V EE 8 TLV7011, TLV7021, TLV7012, TLV7022 SLVSDM5F – SEPTEMBER 2017 – REVISED MARCH 2020 www.ti.com Product Folder Links: TLV7011 TLV7021 TLV7012 TLV7022 Submit Documentation Feedback Copyright © 2017–2020, Texas Instruments Incorporated 6.10 Electrical Characteristics (Dual) VS = 1.8 V to 5 V, VCM = VS / 2; minimum and maximum values are at TA = –40°C to +125°C (unless otherwise noted). Typical values are at TA = 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIO Input Offset Voltage VS = 1.8 V and 5 V, VCM = VS / 2 ±0.1 ±8 mV VHYS Hysteresis VS = 1.8 V and 5 V, VCM = VS / 2 2 7.2 15 mV VCM Common-mode voltage range VEE VCC + 0.1 V IB Input bias current 2 pA IOS Input offset current 1 pA VOH Output voltage high (for TLV7012 only) VS = 5 V, VEE = 0 V, IO = 3 mA 4.65 4.8 V VOL Output voltage low VS = 5 V, VEE = 0 V, IO = 3 mA 250 350 mV ILKG Open-drain output leakage current (TLV7022 only) VS = 5 V, VID = +0.1 V (output high), VPULLUP = VCC 100 pA CMRR Common-mode rejection ratio VEE < VCM < VCC, VS = 5 V 73 dB PSRR Power supply rejection ratio VS = 1.8 V to 5 V, VCM = VS / 2 77 dB ISC Short-circuit current VS = 5 V, sourcing (for TLV7012 only) 29 mA VS = 5 V, sinking 33 ICC Supply current / Channel VS = 1.8 V, no load, VID = –0.1 V (Output Low) 4.7 9 µA (1) The lower limit for RP is 650 Ω 6.11 Switching Characteristics (Dual) Typical values are at TA = 25°C, VS = 5 V, VCM = VS / 2; CL = 15 pF, input overdrive = 100 mV (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPHL Propagation delay time, high to- low (RP = 4.99 kΩ TLV7022 only) (1) Midpoint of input to midpoint of output, VOD = 100 mV 310 ns tPLH Propagation delay time, low-to high (RP = 4.99 kΩ TLV7022 only) (1) Midpoint of input to midpoint of output, VOD = 100 mV 260 ns tR Rise time (TLV7012 only) Measured from 20% to 80% 5 ns tF Fall time Measured from 20% to 80% 5 ns tON Power-up time During power on, VCC must exceed 1.6V for 20 µs before the output is in a correct state. 20 µs 6.12 Timing Diagrams Figure 1. Start-Up Time Timing Diagram (IN+ > IN–) |
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