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TSB41BA3FTPFPEP Datasheet(PDF) 3 Page - Texas Instruments |
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TSB41BA3FTPFPEP Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 73 page ![]() 5 Terminal Configuration and Functions 2 3 AGND AVDD DGND DVDD-CORE SM SE CPS S3 S4 PLLVDD-3.3 PLLVDD-CORE PLLVDD-CORE PLLGND XI XO PLLGND AVDD R0 R1 AGND 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 4 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 AGND AGND AVDD DGND DVDD-CORE S2_PC0 S1_PC1 S0_PC2 DVDD-3.3 DVDD-3.3 DVDD-CORE DGND VREG_PD BMODE RESET DGND PD TESTM ENHANCE_EN LPS 5 6 7 8 PFP PACKAGE (TOP VIEW) 59 58 57 56 55 60 54 52 51 50 53 9 10 11 12 13 49 48 1 47 46 45 44 14 15 16 17 18 19 20 43 42 41 TSB41BA3F Terminal Functions TERMINAL I/O DESCRIPTION NAME TYPE PFP NO. AGND Supply 21, 40, 43, 50, 61, 62 – Analog circuit ground terminals. These terminals must be tied together to the low- impedance circuit board ground plane. AVDD Supply 24, 39, 44, 51, 57, 63 – Analog circuit power terminals. A combination of high-frequency decoupling capacitors near each terminal is suggested, such as paralleled 0.1 μF and 0.001 μF. Lower frequency 10- μF filtering capacitors are also recommended. These supply terminals are separated from the PLLVDD-CORE, PLLVDD-3.3, DVDD-CORE, and DVDD-3.3 terminals internal to the device to provide noise isolation. The PLLVDD-3.3, AVDD, and DVDD-3.3 terminals must be tied together with a low dc impedance connection on the circuit board. www.ti.com TSB41BA3F-EP SLLSFA1 – SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TSB41BA3F-EP |
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