UPD17P136ACT datasheet(142/292 Pages) NEC

142 / 292 page

CHAPTER 13 PERIPHERAL HARDWARE

123

13.2.2 Registers Controlling Basic Interval Timer

The basic interval timer is controlled by the BTM mode register and watchdog timer mode register.

Figures 13-10 and 13-11 show the configuration of the respective registers.

Figure 13-10. BTM Mode Register

Bit 3

BTMISEL

Bit 2

BTMRES

Bit 1

BTMCK1

Bit 0

BTMCK0

Read/write

Initial value when reset

R/W

Selects count pulse of BTM

fX/8192

(execution time of 512 instructions)

fX/4096

(execution time of 256 instructions)

Count up of timer 0

INT pin

(information on INT pin that

has gone through AC zero

cross detection circuit when

ZCROSS = 1)

BTMCK1

BTMCK0

Resets BTM

Does not affect basic interval timer (BTM).

Resets binary counter of basic interval

timer (BTM).

BTMRES

Selects interval time

Sets count pulse divided by 128 as interval

time.

Sets count pulse divided by 32 as interval

time.

BTMISEL

Remark

Read = R, write = W

RF : 13H

BTMRES is automatically cleared to 0 after it

has been set to 1.

This bit is always “0” when it is read.

UPD17P136ACT Datasheet(PDF) 142 Page - NEC

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