UPD17P136ACT datasheet(143/292 Pages) NEC

143 / 292 page

CHAPTER 13 PERIPHERAL HARDWARE

124

Figure 13-11. Watchdog Timer Mode Register

13.2.3 Operation of Basic Interval Timer

The basic interval timer is a 7-bit binary counter that always counts up by using a count pulse specified by the BTM

mode register. Counting operation cannot be stopped.

The interval time of the basic interval timer can be changed by using the BTMISEL bit of the BTM mode register.

When BTMISEL = 0, the interval time is the count pulse divided by 128 (128/fBTM); when BTMISEL = 1, the interval

time is the count pulse divided by 32 (32/fBTM).

The contents of the counter are not cleared to 0 even if the interval time is changed.

Bit 3

WDTRES

Bit 2

Bit 1

Bit 0

WDTEN

Read/write

Initial value at reset

R/W

Read = R, write = W

RF : 03H

WDTEN

Does not affect watchdog timer.

Sets flip-flop that holds overflow carry of

BTM used by watchdog timer.

WDTRES

Enables watchdog timer function

Watchdog timer stops.

Watchdog timer starts operating.

Resets watchdog timer

Remarks 1. WDTEN cannot be cleared to 0 by program.

2. WDTEN is automatically cleared to 0 after it

has been set to 1. This bit is always 0 when

it is read.

Remark WDTRES is automatically cleared to 0 after it

has been set to 1. This bit is always 0 when

it is read.

UPD17P136ACT Datasheet(PDF) 143 Page - NEC