UPD17P136ACT datasheet(147/292 Pages) NEC

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CHAPTER 13 PERIPHERAL HARDWARE

128

13.3 A/D CONVERTER

µPD17134A subseries contains an 8-bit resolution A/D converter with 4-channel analog input (P0C0/ADC0 - P0C3/

ADC3).

The A/D converter uses the successive approximation method. The following two operation modes are available:

(1) Successive mode: 8-bit A/D conversion occurs starting at high-order bits.

(2) Single mode: Comparison occurs with an arbitrary voltage value set in the 8-bit data register.

13.3.1 A/D Converter Configuration

Figure 13-13 shows the A/D converter configuration.

Figure 13-13. Block Diagram of the A/D Converter

Cautions 1. The 8-bit data register (ADCR) is cleared to 00H when the STOP instruction has been

executed.

2. If the HALT instruction is executed during A/D conversion, a current keeps flowing between

VADC and GND.

ADCSOFT

ADCCMP ADCEND

ADCSTRT

0 ADCCH1

ADCCH0

RF:20H

RF:21H

Internal bus

RF:22H

Remark n = 0 to 3

Read signal

P0CnIDI

P0CBIOn

P0Cn/ADCn

VADC

Selector

Output

latch

Selector

3R/2

R/2

Tap decoder

Comparator

D/A converter

8-bit data register

(ADCR)

Control circuit

A/D end signal

STOP instruction signal

Analog power of

A/D converter

UPD17P136ACT Datasheet(PDF) 147 Page - NEC

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