UPD17P136ACT datasheet(149/292 Pages) NEC

149 / 292 page

CHAPTER 13 PERIPHERAL HARDWARE

130

Figure 13-14. A/D Converter Control Register (1/2)

Remarks 1.

In the single mode, the flag content is

valid for the third and subsequent in-

structions after ADCSTRT is set (1) or

data is set in ADCR until ADCSTRT or

ADCR is set again.

In the successive mode, a value changes

according to an A/D conversion value.

However, the bit for this value cannot be

identified.

ADCCMP is automatically cleared to 0

when “PUT ADCR, DBF” instruction is

executed.

Bit 3

Bit 2

Bit 1

Bit 0

R/W

ADCEND

End of A/D conversion

Read/write

Initial value when reset

ADCCMP Compare result (valid only in the single mode)

ADCSOFT

A/D operation mode selection flag

Successive mode

Single mode

RF: 21H

Read = R, write = W

ADCSOFT

ADCCMP ADCEND

Initial status or during A/D conversion.

Indicates the end of A/D conversion in

successive mode.

Cleared to 0 by setting (1) or resetting

ADCSTRT.

Analog input voltage is lower than output

voltage of the internal D/A converter.

Analog input voltage is higher than output

voltage of the internal D/A converter.

UPD17P136ACT Datasheet(PDF) 149 Page - NEC

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