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LTC7803 Datasheet(PDF) 11 Page - Analog Devices |
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LTC7803 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 44 page ![]() LTC7817 11 Rev 0 For more information www.analog.com PIN FUNCTIONS FREQ (Pin 1): Frequency Control Pin for the Internal Oscillator. Connect to ground to set the switching fre- quency to 380KHz. Connect to INTVCC to set the switch- ing frequency to 2.25MHz. Frequencies between 100kHz and 3MHz can be programmed using a resistor between the FREQ pin and ground. Minimize the capacitance on this pin. PLLIN/MODE (Pin 2): External Synchronization Input and Mode Select Input. When an external clock is applied to this pin, the phase-locked loop forces the rising TG1 sig- nal to be synchronized with the rising edge of the external clock, and the regulators operate in forced continuous mode. When not synchronizing to an external clock, this input, which acts on all three channels, determines how the LTC7817 operates at light loads. Pulling this pin to ground selects Burst Mode operation. An internal 100k resistor to ground also invokes Burst Mode operation when the pin is floating. Tying this pin to INTVCC forces continuous inductor current operation. Tying this pin to INTVCC through a 100k resistor selects pulse-skipping operation. SGND (Pin 8): Small Signal Ground common to all three controllers, must be routed separately from high current grounds to the common (-) terminals of the CINcapacitors. RUN1, RUN2, RUN3 (Pins 9, 10, 11): Run Control Inputs for Each Controller. Forcing any of these pins below 1.1V disables switching of the corresponding controller. Forcing all of these pins below 0.7V shuts down the entire LTC7817, reducing the quiescent current to approximately 1.5µA. These pins can be tied to VIN or VBIAS for always- on operation. VPRG3 (Pin 17): Boost Output Voltage Programming Pin. This pin sets the boost channel to adjustable output volt- age or to a fixed output voltage. Floating this pin allows the boost channel output to be programmed through the VFB3 pin using external resistors, regulating VFB3 to the 1.2V reference. Connecting this pin to GND or INTVCC programs the boost channel output to 8V or 10V (respec- tively), with VFB3 directly connected to the output. INTVCC (Pin 22): Output of the Internal 5.1V Low Dropout Regulator. The driver and control circuits are powered by this supply. Must be decoupled to ground with a minimum of 4.7μF ceramic or tantalum capacitor. EXTVCC (Pin 23): External Power Input to an Internal LDO Connected to INTVCC. This LDO supplies INTVCC power, bypassing the internal LDO powered from VBIAS whenever EXTVCC is higher than 4.7V. See INTVCC Regulators in the Applications Information section. Do not exceed 30V on this pin. Connect this pin to ground if the EXTVCC LDO is not used. VBIAS (Pin 24): Main Bias Input Supply Pin. A bypass capacitor should be tied between this pin and ground. BG1, BG2, BG3 (Pins 29, 21, 25): High Current Gate Drives for Bottom N-Channel MOSFETs. Voltage swing at these pins is from ground to INTVCC. BOOST1, BOOST2, BOOST3 (Pins 30, 20, 26): Bootstrapped Supplies to the Top Side Floating Drivers. Connect capacitors between the corresponding BOOST and SW pins for each channel. Also connect Schottky diodes between the BOOST1 and INTVCC pins, the BOOST2 and INTVCC pins, and the BOOST3 and INTVCC pins. Voltage swing at the BOOST1, 2 pins is from INTVCC to (VIN+INTVCC). Voltage swing at the BOOST3 pin is from INTVCC to (VOUT3 + INTVCC). SW1, SW2, SW3 (Pins 31, 19, 28): Switch Node Connections to Inductors. TG1, TG2, TG3 (Pins 32, 18, 27): High Current Gate Drives for Top N-Channel MOSFETs. These are the out- puts of floating drivers with a voltage swing of INTVCC superimposed on the switch node voltage SW. PGOOD1 (Pin 33): Open-Drain Power Good Output. The VFB1 pin is monitored to ensure that VOUT1 is in regulation. When VOUT1 is not within ±10% of its regulation point, the PGOOD1 pin is pulled low. |
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