ATMEGA640 datasheet(203/436 Pages) MICROCHIP

203 / 436 page

203

ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

Note:

1. The baud rate is defined to be the transfer rate in bit per second (bps).

BAUD

Baud rate (in bits per second, bps).

fOSC

System Oscillator clock frequency.

UBRRn

Contents of the UBRRHn and UBRRLn Registers, (0-4095).

Some examples of UBRRn values for some system clock frequencies are found in Table 22-9 on page 223.

22.3.2

Double Speed Operation (U2Xn)

The transfer rate can be doubled by setting the U2Xn bit in UCSRnA. Setting this bit only has effect for the asyn-

chronous operation. Set this bit to zero when using synchronous operation.

Setting this bit will reduce the divisor of the baud rate divider from 16 to 8, effectively doubling the transfer rate for

asynchronous communication. Note however that the Receiver will in this case only use half the number of sam-

ples (reduced from 16 to 8) for data sampling and clock recovery, and therefore a more accurate baud rate setting

and system clock are required when this mode is used. For the Transmitter, there are no downsides.

22.3.3

External Clock

External clocking is used by the synchronous slave modes of operation. The description in this section refers to

Figure 22-2 on page 202 for details.

External clock input from the XCKn pin is sampled by a synchronization register to minimize the chance of meta-

stability. The output from the synchronization register must then pass through an edge detector before it can be

used by the Transmitter and Receiver. This process introduces a two CPU clock period delay and therefore the

maximum external XCKn clock frequency is limited by the following equation:

Note that fosc depends on the stability of the system clock source. It is therefore recommended to add some margin

to avoid possible loss of data due to frequency variations.

Table 22-1.

Equations for Calculating Baud Rate Register Setting

Operating Mode

Equation for Calculating Baud Rate(1)

Equation for Calculating UBRR Value

Asynchronous Normal mode

(U2Xn = 0)

Asynchronous Double Speed

mode (U2Xn = 1)

Synchronous Master mode

BAUD

fOSC

16 UBRRn 1



------------------------------------------

UBRRn

fOSC

16BAUD

------------------------ 1

–

BAUD

fOSC

8 UBRRn 1



---------------------------------------

UBRRn

fOSC

8BAUD

-------------------- 1

–

BAUD

fOSC

2 UBRRn 1



---------------------------------------

UBRRn

fOSC

2BAUD

-------------------- 1

–

fXCK

fOSC

-----------



ATMEGA640 Datasheet(PDF) 203 Page - Microchip Technology

ATMEGA640 Datasheet(HTML) 203 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL