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ATMEGA640 Datasheet(PDF) 368 Page - Microchip Technology |
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ATMEGA640 Datasheet(HTML) 368 Page - Microchip Technology |
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368 / 436 page ![]() 368 ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET] DS40002211A 2. This assumes 50% clock duty cycle. The half period is actually the low time of the external clock, XTAL1. Table 31-12. External Data Memory Characteristics, 4.5 to 5.5 Volts, 1 Cycle Wait-state Symbol Parameter 8MHz Oscillator Variable Oscillator Unit Min. Max. Min. Max. 01/tCLCL Oscillator Frequency 0.0 16 MHz 10 tRLDV Read Low to Data Valid 200 2.0tCLCL-50 ns 12 tRLRH RD Pulse Width 240 2.0tCLCL-10 15 tDVWH Data Valid to WR High 240 2.0tCLCL 16 tWLWH WR Pulse Width 240 2.0tCLCL-10 Table 31-13. External Data Memory Characteristics, 4.5 to 5.5 Volts, SRWn1 = 1, SRWn0 = 0 Symbol Parameter 4MHz Oscillator Variable Oscillator Unit Min. Max. Min. Max. 01/tCLCL Oscillator Frequency 0.0 16 MHz 10 tRLDV Read Low to Data Valid 325 3.0tCLCL-50 ns 12 tRLRH RD Pulse Width 365 3.0tCLCL-10 15 tDVWH Data Valid to WR High 375 3.0tCLCL 16 tWLWH WR Pulse Width 365 3.0tCLCL-10 Table 31-14. External Data Memory Characteristics, 4.5 to 5.5 Volts, SRWn1 = 1, SRWn0 = 1 Symbol Parameter 4MHz Oscillator Variable Oscillator Unit Min. Max. Min. Max. 01/tCLCL Oscillator Frequency 0.0 16 MHz 10 tRLDV Read Low to Data Valid 325 3.0tCLCL-50 ns 12 tRLRH RD Pulse Width 365 3.0tCLCL-10 14 tWHDX Data Hold After WR High 240 2.0tCLCL-10 15 tDVWH Data Valid to WR High 375 3.0tCLCL 16 tWLWH WR Pulse Width 365 3.0tCLCL-10 |
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