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ATMEGA640 Datasheet(PDF) 369 Page - Microchip Technology |
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ATMEGA640 Datasheet(HTML) 369 Page - Microchip Technology |
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369 / 436 page ![]() 369 ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET] DS40002211A Notes: 1. This assumes 50% clock duty cycle. The half period is actually the high time of the external clock, XTAL1. 2. This assumes 50% clock duty cycle. The half period is actually the low time of the external clock, XTAL1. Table 31-15. External Data Memory Characteristics, 2.7 to 5.5 Volts, No Wait-state Symbol Parameter 4MHz Oscillator Variable Oscillator Unit Min. Max. Min. Max. 01/tCLCL Oscillator Frequency 0.0 8 MHz 1tLHLL ALE Pulse Width 235 tCLCL-15 ns 2tAVLL Address Valid A to ALE Low 115 0.5tCLCL-10(1) 3a tLLAX_ST Address Hold After ALE Low, write access 55 3b tLLAX_LD Address Hold after ALE Low, read access 55 4tAVLLC Address Valid C to ALE Low 115 0.5tCLCL-10(1) 5tAVRL Address Valid to RD Low 235 1.0tCLCL-15 6tAVWL Address Valid to WR Low 235 1.0tCLCL-15 7tLLWL ALE Low to WR Low 115 130 0.5tCLCL-10(2) 0.5tCLCL+5(2) 8tLLRL ALE Low to RD Low 115 130 0.5tCLCL-10(2) 0.5tCLCL+5(2) 9tDVRH Data Setup to RD High 45 45 10 tRLDV Read Low to Data Valid 190 1.0tCLCL-60 11 tRHDX Data Hold After RD High 0 0 12 tRLRH RD Pulse Width 235 1.0tCLCL-15 13 tDVWL Data Setup to WR Low 105 0.5tCLCL-20(1) 14 tWHDX Data Hold After WR High 235 1.0tCLCL-15 15 tDVWH Data Valid to WR High 250 1.0tCLCL 16 tWLWH WR Pulse Width 235 1.0tCLCL-15 Table 31-16. External Data Memory Characteristics, 2.7 to 5.5 Volts, SRWn1 = 0, SRWn0 = 1 Symbol Parameter 4MHz Oscillator Variable Oscillator Unit Min. Max. Min. Max. 01/tCLCL Oscillator Frequency 0.0 8 MHz 10 tRLDV Read Low to Data Valid 440 2.0tCLCL-60 ns 12 tRLRH RD Pulse Width 485 2.0tCLCL-15 15 tDVWH Data Valid to WR High 500 2.0tCLCL 16 tWLWH WR Pulse Width 485 2.0tCLCL-15 |
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