LPC435X datasheet(28/162 Pages) NXP

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LPC435X_3X_2X_1X

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Product data sheet

Rev. 5.4 — 10 January 2020

28 of 162

NXP Semiconductors

LPC435x/3x/2x/1x

32-bit ARM Cortex-M4/M0 microcontroller

P6_0

M12

105

[2]

R — Function reserved.

I2S0_RX_MCLK — I2S receive master clock.

R — Function reserved.

I/O I2S0_RX_SCK — Receive Clock. It is driven by the master

and received by the slave. Corresponds to the signal SCK in

the I2S-bus specification.

R — Function reserved.

P6_1

R15

107

[2]

I/O GPIO3[0] — General purpose digital input/output pin.

EMC_DYCS1 — SDRAM chip select 1.

I/O U0_UCLK — Serial clock input/output for USART0 in

synchronous mode.

I/O I2S0_RX_WS — Receive Word Select. It is driven by the

master and received by the slave. Corresponds to the signal

WS in the I2S-bus specification.

R — Function reserved.

T2_CAP0 — Capture input 2 of timer 2.

R — Function reserved.

P6_2

L13

111

[2]

I/O GPIO3[1] — General purpose digital input/output pin.

EMC_CKEOUT1 — SDRAM clock enable 1.

I/O U0_DIR — RS-485/EIA-485 output enable/direction control

for USART0.

I/O I2S0_RX_SDA — I2S Receive data. It is driven by the

transmitter and read by the receiver. Corresponds to the

signal SD in the I2S-bus specification.

R — Function reserved.

T2_CAP1 — Capture input 1 of timer 2.

R — Function reserved.

Table 3.

Pin description …continued

Pin name

Description

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