LT3932 datasheet(23/28 Pages) AD

23 / 28 page

LT8386

Rev. 0

For more information www.analog.com

EN/UVLO pin sinks 2µA current when the EN/UVLO pin

voltage is below the threshold.

On the other hand, the VIN overvoltage lockout (OVLO)

threshold can be accurately set by the external resistor

divider as well. Figure 14 illustrates how to set the rising

OVLO threshold in LT8386. The internal hysteresis of the

OVLO pin is 50mV.

APPLICATIONS INFORMATION

Planning for Thermal Shutdown

The LT8386 automatically stops switching when the

internal temperature is too high. The temperature limit is

guaranteed to be higher than the operational temperature

of the part. During thermal shutdown, all switching is

terminated, SS is forced low, and the LEDs are discon-

nected through the PWMTG driver. The exposed pad on

the bottom of the package must be soldered to a ground

plane. Vias placed directly under the package are neces-

sary to dissipate heat.

Designing the Printed Circuit Board (PCB)

The output capacitors COUT1 and COUT2 of the LT8386

bypass large switched currents from VOUT to GND (see

Figure 6). The loops travelled by these currents should

be made small as possible to these pins. These output

capacitors, along with the inductor and the input capaci-

tors, should be placed on the same side of the PCB, and

their connections should be made on that layer.

Create a Kelvin ground network by keeping the ground

connection for all of the other components separate.

It should only join the ground for the input and output

capacitors and the return path for the LED current at the

exposed pad.

There are a few other aspects of the board design that

improve performance. An unbroken ground plane on

the second layer dissipates heat, but also reduces noise.

Likewise minimizing the area of the SW and BST nodes

reduces noise. The traces for FB and VC should be kept

short to lessen the susceptibility to noise of these high-

impedance nodes. Matched Kelvin connections from the

external current sense resistor to the ISP and ISN pins

are essential for current regulation accuracy. Use bypass

capacitors for the DC input nodes such as VIN, CTRL, and

PWM (for internal PWM) to reduce noise. Keep the RT

and RP nodes small and away from noisy signals. Finally,

a diode with anode connected to ground and cathode to

the drain of the PWMTG MOSFET can protect that device

from overvoltage caused by excessive inductance in the

LED string. Please refer to the demo board layout of the

LT8386 for more information.

Figure 14. OVLO Threshold and Hysteresis Voltages

LT8386

VIN

8386 F14

OVLO

RISING THRESHOLD

VIN(OVLO) = 1.205V • 1+

⎛

⎝

⎜

⎞

⎠

⎟

FALLING HYSTERESIS

VHYST(OVLO) = 50mV • 1+

⎛

⎝

⎜

⎞

⎠

⎟

Figure 15. EN/UVLO — OVLO Threshold and Hysteresis Voltages

LT8386

8386 F15

OVLO

EN/ULVO

VIN

VIN(UVLO) = 1.33V • 1+

R6+R7

⎛

⎝

⎜

⎞

⎠

⎟

VHYST(UVLO) = 25mV • 1+

R6+R7

⎛

⎝

⎜

⎞

⎠

⎟+R5 • 2µA

VIN(OVLO) = 1.205V • 1+

R5+R6

⎛

⎝

⎜

⎞

⎠

⎟

VHYST(OVLO) = 50mV • 1+

R5+R6

⎛

⎝

⎜

⎞

⎠

⎟

Both EN/UVLO and OVLO can be set precisely using a

single resistor string consisting of three series resistors.

Figure 15 shows the resistor string and the threshold and

hysteresis voltages for EN/UVLO and OVLO.

Tie EN/UVLO to VIN and tie OVLO to GND if they are not

used. Do not leave these pins open.

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