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FXLS93333 Datasheet(PDF) 39 Page - NXP Semiconductors |
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FXLS93333 Datasheet(HTML) 39 Page - NXP Semiconductors |
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39 / 254 page  NXP Semiconductors FXLS9xxxx Dual channel inertial sensor Bit Type Address Register 7 6 5 4 3 2 1 0 R $04 DEVSTAT3 MISO_ERR OSCTRAIN_ERR RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED R $05 COMMREV 0 0 0 0 COMMREV[3:0] R $06 MREAD_STAT RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED MARGIN_RD_ACT MARGIN_RD_ERR R $07 - $0D RESERVED RESERVED R $0E TEMPERATURE TEMP[7:0] R $0F RESERVED RESERVED Table 44. User accessible data - general device information...continued 11.1.2 User accessible data - communication information Bit Type[1] Address Register 7 6 5 4 3 2 1 0 R/W $10 DEVLOCK_WR ENDINIT RESERVED RESERVED RESERVED SUP_ERR_DIS RESERVED RESET[1:0] R/W $11 WRITE_OTP_ EN UOTP_ WR_INIT MARGIN_ RD_EN RESERVED RESERVED EX_ COMMTYPE EX_PADDR UOTP_REGION[1:0] R/W $12 BUSSW_CTRL RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED BUSSW_CTRL[1:0] R/W $13 PSI5_TEST RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED PSI5_TEST R/W $14 UF_REGION_W REGION_LOAD[3:0] 0 0 0 0 R $15 UF_REGION_R REGION_ACTIVE[3:0] 0 0 0 0 UF2 $16 COMMTYPE RESERVED RESERVED RESERVED RESERVED RESERVED COMMTYPE[2:0] UF2 $17 RESERVED RESERVED UF2 $18 PHYSADDR 0 0 0 0 PADDR[3:0] UF2 $19 RESERVED RESERVED UF2 $1A SOURCEID_0 SID0_EN PDCMFORMAT[2:0] SOURCEID_0[3:0] UF2 $1B SOURCEID_1 SID1_EN RESERVED RESERVED RESERVED SOURCEID_1[3:0] UF2 $1C SOURCEID_2 SID2_EN RESERVED RESERVED RESERVED SOURCEID_2[3:0] UF2 $1D SOURCEID_3 SID3_EN RESERVED RESERVED RESERVED SOURCEID_3[3:0] UF2 $1E - $21 RESERVED RESERVED UF2 $22 TIMING_CFG PDCM_PER[2:0] OSCTRAIN_ SEL CK_CAL_RST CRM_PER[1:0] CK_CAL_EN UF2 $23 CHIPTIME ST_RPT[1:0] PSI5_ ERRLATCH SS_EN CHIPTIME[3:0] UF2 $24 TIMING_CFG2 PSI5_ INIT2_D19 OSCTRAIN_ERRCNT[2:0] CAPTEST_OFF RESERVED BDM_ FRAGSIZE BDM_EN UF2 $25 PSI5_CFG SYNC_PD DAISY_CHAIN PSI5_ILOW DUALTRANS EMSG_EXT P_CRC INIT2_EXT ASYNC UF2 $26 PDCM_ RSPST0_L PDCM_RSPST0[7:0] UF2 $27 PDCM_ RSPST0_H BRC_RSP0[1:0] RESERVED PDCM_RSPST0[12:8] UF2 $28 PDCM_ RSPST1_L PDCM_RSPST1[7:0] UF2 $29 PDCM_ RSPST1_H BRC_RSP1[1:0] RESERVED PDCM_RSPST1[12:8] UF2 $2A PDCM_ RSPST2_L PDCM_RSPST2[7:0] UF2 $2B PDCM_ RSPST2_H BRC_RSP2[1:0] RESERVED PDCM_RSPST2[12:8] UF2 $2C PDCM_ RSPST3_L PDCM_RSPST3[7:0] UF2 $2D PDCM_ RSPST3_H BRC_RSP3[1:0] RESERVED PDCM_RSPST3[12:8] UF2 $2E - $37 RESERVED RESERVED UF2 $38 PDCM_CMD_ B_L PDCM_CMD_B[7:0] UF2 $39 PDCM_CMD_ B_H RESERVED RESERVED RESERVED PDCM_CMD_B[12:8] Table 45. User accessible data - communication information FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 39 / 254 |
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