FXLS93333 datasheet(64/254 Pages) NXP

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NXP Semiconductors

FXLS9xxxx

Dual channel inertial sensor

PDCM_PER[2] PDCM_PER[1] PDCM_PER[0]

Periodic data collection mode period

1000 µs

2000 µs

Table 96. Periodic data collection mode period (PDCM_PER[3:0])...continued

In DSI3 mode, PDCM, and BDM commands are decoded and responded to regardless

of the value of this register as long as the general PDCM timing parameters specified in

Section 10.11 are met. See Section 11.5.1 for details regarding oscillator training.

In PSI5 synchronous mode, sync pulses are decoded and responded to regardless of the

value of this register as long as the general timing parameters specified in Section 10.12

are met. See Section 11.5.1 for details regarding oscillator training.

In PSI5 asynchronous mode, oscillator training is not applicable.

In PSI5 Programming Mode, oscillator training is not applicable.

In PSI5 Daisy Chain command phase, oscillator training is not applicable.

In SPI mode, sensor data requests are decoded and responded to regardless of the

value of this register as long as the general timing parameters specified in Section 10.13

are met. See Section 11.5.1 for details regarding oscillator training.

In I2C mode, sensor data register reads are decoded and responded to regardless of the

value of this register as long as the general timing parameters specified in Section 10.14

are met. See Section 11.5.1 for details regarding oscillator training.

11.2.14.2 Oscillator training protocol selection bit (OSCTRAIN_SEL)

The oscillator training selection bit selects the protocol to use for oscillator training for the

COMMTYPE values that enable multiple protocols as shown in Table 97.

COMMTYPE

OSCTRAIN_SEL

Protocol to use for oscillator training

DSI3

SPI

PSI5

SPI

DSI3

SPI

PSI5

I2C

Table 97. Oscillator training protocol selection bit (OSCTRAIN_SEL)

11.2.14.3 Clock calibration value reset (CK_CAL_RST)

The clock calibration reset bit controls the state of the oscillator training when the

CK_CAL_EN bit is cleared as described in the table in Section 11.2.14.5. See

Section 11.5.1 for details regarding oscillator training.

FXLS9xxxx

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 8 February 2021

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