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SLG47503M Datasheet(PDF) 67 Page - Dialog Semiconductor |
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SLG47503M Datasheet(HTML) 67 Page - Dialog Semiconductor |
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67 / 191 page ![]() Datasheet 16-Jul-2021 CFR0011-120-00 Revision 2.0 67 of 191 © 2021 Dialog Semiconductor SLG47502/03 Low Voltage GreenPAK Programmable Mixed-Signal Matrix Preliminary Figure 47: 8-bit Multi-Function Macrocells Block Diagram (3-bit LUT14/DFF19, CNT/DLY5) CNT/DLY5 OUT ext_CLK DLY_IN/CNT Reset 3-bit LUT14 OUT IN0 IN1 8-bits NVM IN2 registers [1158:1152] From Connection Matrix Output [60] To Connection Matrix Input [26] LUT Truth Table CNT Data S0 S1 Config Data CLK D Q/nQ DFF Registers From Connection Matrix Output [59] S0 S1 From Connection Matrix Output [58] S0 S1 S0 S1 S0 S1 S2 S3 registers [1191:1184] nRST/nSET To Connection Matrix Input [27] S0 S1 S0 S1 S0 S1 0 S0 S1 S2 S3 0 LUT/DFF Sel registers [1171:1168] register [1164] Mode Sel register [1152] DFF or Latch Select register [1153] Output Select (Q or nQ) register [1154] DFF Initial Polarity Select register [1155] (nRST or nSET) from matrix Output DFF/ Latch19 registers [1179:1176], [1173:1172], [1167:1165], [1162:1159] |
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