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TC9496AF Datasheet(PDF) 20 Page - Toshiba Semiconductor |
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TC9496AF Datasheet(HTML) 20 Page - Toshiba Semiconductor |
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20 / 48 page ![]() TC9496AF 2002-01-11 20 3.2 Commands Description Each command explanation is shown below. * mark in each command explanation table shows the initial value at the time of reset. Command-40h (0100 0000): TIMING D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 SYPD SYD1 SYD0 SYPA SYA1 SYA0 SYPS SYS1 SYS0 0 CKOS 12 CKOS 11 CKOS 10 CKOS 02 CKOS 01 CKOS 00 Bit Name Description Value Operation 0* ASP program starts on falling edge D15 SYPD ASP digital block sync polarity switching 1 ASP program starts on rising edge 0* Signal after SYNC output 1 SYNC pin 2 ELRI pin D14 D13 SYD [1:0] ASP digital block SYNC signal input switching 3 ELRO pin 0* DF-processing starts in a falling D12 SYPA DF block sync polarity switching 1 DF-processing starts in a rising 0* Signal after SYNC output 1 SYNC pin 2 ELRI pin D11 D10 SYA [1:0] DF block SYNC signal input switching 3 ELRO pin 0* Operates at polarity for SYPD, SYPA settings above. D9 SYPS Overall system sync polarity switching 1 Reverses all polarities for SYPD, SYPA settings above. 0* Internal SYNC signal 1 SYNC pin 2 ELRI pin D8 D7 SYS [1:0] SYNC circuit input signal switching selection 3 ELRO pin D6 ¾ Fixed to 0 (zero) ¾ ¾ 0* Fixed to L output 1 fs2 (internal fs ´ 2) 2 fs4 (internal fs ´ 4) 3 fs8 (internal fs ´ 8) 4 fs16 (internal fs ´ 16) 5 fs32 (internal fs ´ 32) 6 fs64 (internal fs ´ 64) D5 D4 D3 CKOS1 [2:0] CKO1 (50 pin) pin output selection 7 Output XI divided by 2 0* Fixed to L output 1 fs2 (internal fs ´ 2) 2 fs4 (internal fs ´ 4) 3 fs8 (internal fs ´ 8) 4 fs16 (internal fs ´ 16) 5 fs32 (internal fs ´ 32) 6 fs64 (internal fs ´ 64) D2 D1 D0 CKOS0 [2:0] CKO0 (49 pin) pin output selection 7 fs128 (internal fs ´ 128) |
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