4

Pin Name

Pin

Pin Type

Pin Description

TO_NODE[0]+

20

O-PECL

In CDR at entry configuration, this pin is the Serial Output

(TO_LOOP+). In other configurations, this pin is wired to the hard disk.

TO_NODE[0]–

21

O-PECL

In CDR at entry configuration, this pin is the Serial Output

(TO_LOOP–). In other configurations, this pin is wired to the hard disk.

FM_NODE[1]+

02

I-PECL

Input from Transceiver IC to Cell 1.

FM_NODE[1]–

01

I-PECL

Input from Transceiver IC to Cell 1.

TO_NODE[1]+

05

O-PECL

Output to Transceiver IC from Cell 1.

TO_NODE[1]–

04

O-PECL

Output to Transceiver IC from Cell 1.

FM_NODE[0]+

23

I-PECL

In CDR at entry configuration, this pin is the Serial Input

(FM_LOOP+). In other configurations, this pin is wired to the hard disk.

FM_NODE[0]–

24

I-PECL

In CDR at entry configuration, this pin is the Serial Input

(FM_LOOP–). In other configurations, this pin is wired to the hard disk.

BYPASS[1]–

08

I-LVTTL

Bypass pin for cell 1. In CDR at exit configuration, float to HIGH else

ground connect through a 1 K

Ω resistor.

BYPASS[0]–

17

I-LVTTL

Bypass pin for cell 0. In CDR at exit configuration, float to HIGH else

ground connect through a 1 K

Ω resistor.

REFCLK

14

I-LVTTL

Reference Clock Input for Clock and Data Recovery (CDR) circuit.

CPLL1

12

C

PLL cap pin. Connected to pin 13 with a 0.1 microFarad capacitor.

CPLL0

13

C

PLL cap pin. Connected to pin 12 with a 0.1 microFarad capacitor.

SD[1]

09

O-LVTTL

Signal Detect via envelope detect method. In CDR at entry and at exit

SD[0]

16

cases, detects signal on incoming cable respectively. Active High when

signal is detected.

If (FM_NODE[0]+ –FM_NODE[0]–) >= 400 mV peak-to-peak, SD = 1

If 400 mV >= (FM_NODE[0]+ –FM_NODE[0]–) >= 100 mV,

SD = unpredictable

If 100 mV >= (FM_NODE[0]+ –FM_NODE[0]–), SD = 0

GND

S

6, 7, 11, 18, 19 Ground pins.

15

S

Analog Power Supply pin.

03

S

Cell 1 High Speed Output Pins Power Supply.

22

S

Cell 0 High Speed Output Pins Power Supply.

10

S

Logic Power Supply pins.

Table 3. Pinout